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[RFC PATCH 18/39] target/riscv: Add vaesz.vs decoding, translation and e
From: |
Lawrence Hunter |
Subject: |
[RFC PATCH 18/39] target/riscv: Add vaesz.vs decoding, translation and execution support |
Date: |
Thu, 19 Jan 2023 14:35:07 +0000 |
Signed-off-by: Lawrence Hunter <lawrence.hunter@codethink.co.uk>
---
target/riscv/helper.h | 1 +
target/riscv/insn32.decode | 1 +
target/riscv/insn_trans/trans_rvzvkns.c.inc | 5 +++--
target/riscv/vcrypto_helper.c | 2 ++
4 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/target/riscv/helper.h b/target/riscv/helper.h
index 9895bf5712..def126a59b 100644
--- a/target/riscv/helper.h
+++ b/target/riscv/helper.h
@@ -1187,3 +1187,4 @@ DEF_HELPER_4(vaesdf_vv, void, ptr, ptr, env, i32)
DEF_HELPER_4(vaesdf_vs, void, ptr, ptr, env, i32)
DEF_HELPER_4(vaesdm_vv, void, ptr, ptr, env, i32)
DEF_HELPER_4(vaesdm_vs, void, ptr, ptr, env, i32)
+DEF_HELPER_4(vaesz_vs, void, ptr, ptr, env, i32)
diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode
index 753039e954..b4ddc2586c 100644
--- a/target/riscv/insn32.decode
+++ b/target/riscv/insn32.decode
@@ -916,3 +916,4 @@ vaesdf_vv 101000 1 ..... 00001 010 ..... 1110111
@r2_vm_1
vaesdf_vs 101001 1 ..... 00001 010 ..... 1110111 @r2_vm_1
vaesdm_vv 101000 1 ..... 00000 010 ..... 1110111 @r2_vm_1
vaesdm_vs 101001 1 ..... 00000 010 ..... 1110111 @r2_vm_1
+vaesz_vs 101001 1 ..... 00111 010 ..... 1110111 @r2_vm_1
diff --git a/target/riscv/insn_trans/trans_rvzvkns.c.inc
b/target/riscv/insn_trans/trans_rvzvkns.c.inc
index 2c70227f8b..145b13bc8c 100644
--- a/target/riscv/insn_trans/trans_rvzvkns.c.inc
+++ b/target/riscv/insn_trans/trans_rvzvkns.c.inc
@@ -43,7 +43,7 @@ static bool vaes_check_vv(DisasContext *s, arg_rmr *a)
static bool vaes_check_overlap(DisasContext *s, int vd, int vs2)
{
int8_t op_size = s->lmul <= 0 ? 1 : 1 << s->lmul;
- return !is_overlapped(vd, op_size, vs2, op_size);
+ return !is_overlapped(vd, op_size, vs2, 1);
}
static bool vaes_check_vs(DisasContext *s, arg_rmr *a)
@@ -52,7 +52,7 @@ static bool vaes_check_vs(DisasContext *s, arg_rmr *a)
vaes_check_overlap(s, a->rd, a->rs2) &&
s->cfg_ptr->ext_zvkns == true &&
vext_check_isa_ill(s) &&
- require_align(a->rd, s->lmul) && require_align(a->rs2, s->lmul) &&
+ require_align(a->rd, s->lmul) &&
s->vstart % 4 == 0 && s->sew == MO_32;
}
@@ -62,3 +62,4 @@ GEN_V_UNMASKED_TRANS(vaesdf_vv, vaes_check_vv)
GEN_V_UNMASKED_TRANS(vaesdf_vs, vaes_check_vs)
GEN_V_UNMASKED_TRANS(vaesdm_vv, vaes_check_vv)
GEN_V_UNMASKED_TRANS(vaesdm_vs, vaes_check_vs)
+GEN_V_UNMASKED_TRANS(vaesz_vs, vaes_check_vs)
diff --git a/target/riscv/vcrypto_helper.c b/target/riscv/vcrypto_helper.c
index 699bf25bbd..39e2498b7d 100644
--- a/target/riscv/vcrypto_helper.c
+++ b/target/riscv/vcrypto_helper.c
@@ -341,3 +341,5 @@ GEN_ZVKNS_HELPER_VS(vaesdm_vs,
aes_inv_shift_bytes(round_state);
aes_inv_sub_bytes(round_state);
xor_round_key(round_state, (uint8_t *)round_key);
aes_inv_mix_cols(round_state);)
+GEN_ZVKNS_HELPER_VS(vaesz_vs,
+ xor_round_key(round_state, (uint8_t *)round_key);)
--
2.39.1
- [RFC PATCH 20/39] target/riscv: Add vaesem.vs decoding, translation and execution support, (continued)
- [RFC PATCH 20/39] target/riscv: Add vaesem.vs decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 14/39] target/riscv: Add vaesdf.vv decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 06/39] target/riscv: Add vrol.[vv, vx] and vror.[vv, vx, vi] decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 05/39] target/riscv: Add vclmulh.vx decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 17/39] target/riscv: Add vaesdm.vs decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 11/39] target/riscv: add zvkns cpu property, Lawrence Hunter, 2023/01/19
- [RFC PATCH 28/39] target/riscv: add zvksh cpu property, Lawrence Hunter, 2023/01/19
- [RFC PATCH 25/39] target/riscv: Add vsha2ms.vv decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 27/39] target/riscv: expose zvknh cpu properties, Lawrence Hunter, 2023/01/19
- [RFC PATCH 10/39] target/riscv: expose zvkb cpu property, Lawrence Hunter, 2023/01/19
- [RFC PATCH 18/39] target/riscv: Add vaesz.vs decoding, translation and execution support,
Lawrence Hunter <=
- [RFC PATCH 12/39] target/riscv: Add vaesef.vv decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 24/39] target/riscv: add zvknh cpu properties, Lawrence Hunter, 2023/01/19
- [RFC PATCH 03/39] target/riscv: Add vclmul.vx decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 13/39] target/riscv: Add vaesef.vs decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 21/39] target/riscv: Add vaeskf1.vi decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 19/39] target/riscv: Add vaesem.vv decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 08/39] target/riscv: Add vrev8.v decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 23/39] target/riscv: expose zvkns cpu property, Lawrence Hunter, 2023/01/19
- [RFC PATCH 29/39] target/riscv: Add vsm3me.vv decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 22/39] target/riscv: Add vaeskf2.vi decoding, translation and execution support, Lawrence Hunter, 2023/01/19