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From: | Daniel Henrique Barboza |
Subject: | Re: [PATCH 01/15] tests/avocado: add RISC-V opensbi boot test |
Date: | Mon, 26 Dec 2022 11:00:07 -0300 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 |
On 12/26/22 10:56, Bin Meng wrote:
On Sat, Dec 24, 2022 at 11:52 AM Bin Meng <bmeng.cn@gmail.com> wrote:Hi, On Fri, Dec 23, 2022 at 2:25 PM Bin Meng <bmeng.cn@gmail.com> wrote:Hi Anup, On Fri, Dec 23, 2022 at 12:56 AM Anup Patel <anup@brainfault.org> wrote:On Thu, Dec 22, 2022 at 6:27 PM Bin Meng <bmeng.cn@gmail.com> wrote:On Thu, Dec 22, 2022 at 6:47 PM Daniel Henrique Barboza <dbarboza@ventanamicro.com> wrote:On 12/22/22 07:24, Bin Meng wrote:On Thu, Dec 22, 2022 at 2:29 AM Daniel Henrique Barboza <dbarboza@ventanamicro.com> wrote:This test is used to do a quick sanity check to ensure that we're able to run the existing QEMU FW image. 'sifive_u', 'spike' and 'virt' riscv64 machines, and 'sifive_u' and 'virt' 32 bit machines are able to run the default RISCV64_BIOS_BIN | RISCV32_BIOS_BIN firmware with minimal options. Cc: Cleber Rosa <crosa@redhat.com> Cc: Philippe Mathieu-Daudé <philmd@linaro.org> Cc: Wainer dos Santos Moschetta <wainersm@redhat.com> Cc: Beraldo Leal <bleal@redhat.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> --- tests/avocado/riscv_opensbi.py | 65 ++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 tests/avocado/riscv_opensbi.py diff --git a/tests/avocado/riscv_opensbi.py b/tests/avocado/riscv_opensbi.py new file mode 100644 index 0000000000..abc99ced30 --- /dev/null +++ b/tests/avocado/riscv_opensbi.py @@ -0,0 +1,65 @@ +# opensbi boot test for RISC-V machines +# +# Copyright (c) 2022, Ventana Micro +# +# This work is licensed under the terms of the GNU GPL, version 2 or +# later. See the COPYING file in the top-level directory. + +from avocado_qemu import QemuSystemTest +from avocado_qemu import wait_for_console_pattern + +class RiscvOpensbi(QemuSystemTest): + """ + :avocado: tags=accel:tcg + """ + timeout = 5 + + def test_riscv64_virt(self): + """ + :avocado: tags=arch:riscv64 + :avocado: tags=machine:virt + """ + self.vm.set_console() + self.vm.launch() + wait_for_console_pattern(self, 'Platform Name') + wait_for_console_pattern(self, 'Boot HART MEDELEG') + + def test_riscv64_spike(self): + """ + :avocado: tags=arch:riscv64 + :avocado: tags=machine:spike + """ + self.vm.set_console() + self.vm.launch() + wait_for_console_pattern(self, 'Platform Name') + wait_for_console_pattern(self, 'Boot HART MEDELEG') + + def test_riscv64_sifive_u(self): + """ + :avocado: tags=arch:riscv64 + :avocado: tags=machine:sifive_u + """ + self.vm.set_console() + self.vm.launch() + wait_for_console_pattern(self, 'Platform Name') + wait_for_console_pattern(self, 'Boot HART MEDELEG') + + def test_riscv32_virt(self): + """ + :avocado: tags=arch:riscv32 + :avocado: tags=machine:virt + """ + self.vm.set_console() + self.vm.launch() + wait_for_console_pattern(self, 'Platform Name') + wait_for_console_pattern(self, 'Boot HART MEDELEG')How about testing riscv32_spike too?I didn't manage to make it work. This riscv64 spark command line boots opensbi: $ ./qemu-system-riscv64 -nographic -display none -vga none -machine spike OpenSBI v1.1 ____ _____ ____ _____ / __ \ / ____| _ \_ _| | | | |_ __ ___ _ __ | (___ | |_) || | | | | | '_ \ / _ \ '_ \ \___ \| _ < | | | |__| | |_) | __/ | | |____) | |_) || |_ \____/| .__/ \___|_| |_|_____/|____/_____| | | |_| (...) The same command line doesn't boot riscv32 spark: ./qemu-system-riscv32 -nographic -display none -vga none -machine spike (--- hangs indefinitely ---) I debugged it a bit and, as far as boot code goes, it goes all the way and loads the opensbi 32bit binary. After that I tried to found any command line example that boots spike with riscv32 bit and didn't find any. So I gave up digging it further because I became unsure about whether 32-bit spike works. If someone can verify that yes, 32-bit spike is supposed to work, then I believe it's worth investigating why it's not the case ATM.+Anup who might know if QEMU spike 32-bit machine works with opensbi 32-bit generic image.We never got HTIF putc() working on QEMU RV32 Spike but it works perfectly fine on QEMU RV64 Spike.Where is the problem for the 32-bit? Is it in OpenSBI or in QEMU?See below log of QEMU RV64 Spike ...If we cannot get Spike 32-bit to work in QEMU, should we drop the 32-bit support? @Alistair FrancisI got a deeper look at the 32-bit spike issue and I believe it is a problem of QEMU HTIF emulation. I will see if I can spin a patch to fix this.It turns out there is a bug in OpenSBI too when booting 32-bit BIN image on Spike. For ELF & BIN image boot on QEMU, QEMU changes are needed. I will send the QEMU patches soon.
I'll wait for your patches to re-send this series. If you can get spike 32-bit to work then I'll re-send the v2 with the 32 bit spike tests enabled. Thanks, Daniel
Regards, Bin
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