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Re: [PATCH v2 0/4] Fix dt-validate issues on qemu dtbdumps due to dt-bin
From: |
Conor Dooley |
Subject: |
Re: [PATCH v2 0/4] Fix dt-validate issues on qemu dtbdumps due to dt-bindings |
Date: |
Wed, 17 Aug 2022 21:07:03 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 |
Please also ignore this series, I accidentally had too much in the folder.
On 17/08/2022 21:05, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> The device trees produced automatically for the virt and spike machines
> fail dt-validate on several grounds. Some of these need to be fixed in
> the linux kernel's dt-bindings, but others are caused by bugs in QEMU.
>
> Patches been sent that fix the QEMU issues [0], but a couple of them
> need to be fixed in the kernel's dt-bindings. The first patches add
> compatibles for "riscv,{clint,plic}0" which are present in drivers and
> the auto generated QEMU dtbs. The final patch should be ignored for all
> serious purposes unless you want to wash your eyes out afterwards, but
> JIC the versioned extensions ever come up, it's there.
>
> Thanks to Rob Herring for reporting these issues [1],
> Conor.
>
> To reproduce the errors:
> ./build/qemu-system-riscv64 -nographic -machine virt,dumpdtb=qemu.dtb
> dt-validate -p
> /path/to/linux/kernel/Documentation/devicetree/bindings/processed-schema.json
> qemu.dtb
> (The processed schema needs to be generated first)
>
> 0 -
> 20220810184612.157317-1-mail@conchuod.ie/">https://lore.kernel.org/linux-riscv/20220810184612.157317-1-mail@conchuod.ie/
> 1 -
> https://lore.kernel.org/linux-riscv/20220803170552.GA2250266-robh@kernel.org/
>
> Changes since v1:
> - drop the "legacy systems" bit from the binding descriptions
> - convert to a regex for the isa string
>
> Conor Dooley (4):
> dt-bindings: timer: sifive,clint: add legacy riscv compatible
> dt-bindings: interrupt-controller: sifive,plic: add legacy riscv
> compatible
> dt-bindings: riscv: add new riscv,isa strings for emulators
> dt-bindings: riscv: isa string bonus content
>
> .../sifive,plic-1.0.0.yaml | 5 +++++
> .../devicetree/bindings/riscv/cpus.yaml | 9 ++++++---
> .../bindings/timer/sifive,clint.yaml | 18 ++++++++++++------
> 3 files changed, 23 insertions(+), 9 deletions(-)
>
>
> base-commit: 568035b01cfb107af8d2e4bd2fb9aea22cf5b868
- [PATCH 0/4] Fix dt-validate issues on qemu dtbdumps due to dt-bindings, Conor Dooley, 2022/08/17
- [PATCH 1/4] dt-bindings: timer: sifive, clint: add legacy riscv compatible, Conor Dooley, 2022/08/17
- [PATCH 2/4] dt-bindings: interrupt-controller: sifive, plic: add legacy riscv compatible, Conor Dooley, 2022/08/17
- [PATCH 3/4] dt-bindings: riscv: add new riscv, isa strings for emulators, Conor Dooley, 2022/08/17
- [NOT-A-PATCH 4/4] dt-bindings: riscv: isa string bonus content, Conor Dooley, 2022/08/17
- [PATCH v2 0/4] Fix dt-validate issues on qemu dtbdumps due to dt-bindings, Conor Dooley, 2022/08/17
- Re: [PATCH v2 0/4] Fix dt-validate issues on qemu dtbdumps due to dt-bindings,
Conor Dooley <=
- [PATCH v2 1/4] dt-bindings: timer: sifive, clint: add legacy riscv compatible, Conor Dooley, 2022/08/17
- [PATCH v2 1/4] hw/riscv: virt: fix uart node name, Conor Dooley, 2022/08/17
- Re: [PATCH 0/4] Fix dt-validate issues on qemu dtbdumps due to dt-bindings, Conor Dooley, 2022/08/17