|
From: | Richard Henderson |
Subject: | Re: [PATCH 3/8] target/riscv: Addition of 128-bit ldu, lq and sq instructions |
Date: | Mon, 30 Aug 2021 19:24:06 -0700 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 |
On 8/30/21 10:16 AM, Frédéric Pétrot wrote:
+#if defined(TARGET_RISCV128) +/* + * Accessing signed 64-bit or 128-bit values should be part of MemOp in + * include/exec/memop.h + * Unfortunately, this requires to change the defines there, as MO_SIGN is 4, + * and values 0 to 3 are usual types sizes. + * Note that an assert is triggered when MemOp is MO_SIGN|MO_TEQ, this value + * being some kind of sentinel.
https://lore.kernel.org/qemu-devel/20210818191920.390759-24-richard.henderson@linaro.org/ r~
[Prev in Thread] | Current Thread | [Next in Thread] |