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Re: [PATCH v2 03/25] hw/sd: ssi-sd: Fix incorrect card response sequence
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [PATCH v2 03/25] hw/sd: ssi-sd: Fix incorrect card response sequence |
Date: |
Sun, 24 Jan 2021 18:48:49 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.6.0 |
On 1/23/21 11:39 AM, Bin Meng wrote:
> From: Bin Meng <bin.meng@windriver.com>
>
> Per the "Physical Layer Specification Version 8.00" chapter 7.5.1,
> "Command/Response", there is a minimum 8 clock cycles (Ncr) before
> the card response shows up on the data out line. However current
> implementation jumps directly to the sending response state after
> all 6 bytes command is received, which is a spec violation.
>
> Add a new state PREP_RESP in the ssi-sd state machine to handle it.
>
> Fixes: 775616c3ae8c ("Partial SD card SPI mode support")
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
> Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
>
> ---
>
> Changes in v2:
> - Add a debug printf in the state handling codes
>
> hw/sd/ssi-sd.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/hw/sd/ssi-sd.c b/hw/sd/ssi-sd.c
> index 9a75e0095c..043e270066 100644
> --- a/hw/sd/ssi-sd.c
> +++ b/hw/sd/ssi-sd.c
> @@ -36,6 +36,7 @@ do { fprintf(stderr, "ssi_sd: error: " fmt , ##
> __VA_ARGS__);} while (0)
> typedef enum {
> SSI_SD_CMD = 0,
> SSI_SD_CMDARG,
> + SSI_SD_PREP_RESP,
Another migration change.
Otherwise (trusting you with the spec):
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> SSI_SD_RESPONSE,
> SSI_SD_DATA_START,
> SSI_SD_DATA_READ,
> @@ -163,12 +164,16 @@ static uint32_t ssi_sd_transfer(SSIPeripheral *dev,
> uint32_t val)
> s->response[1] = status;
> DPRINTF("Card status 0x%02x\n", status);
> }
> - s->mode = SSI_SD_RESPONSE;
> + s->mode = SSI_SD_PREP_RESP;
> s->response_pos = 0;
> } else {
> s->cmdarg[s->arglen++] = val;
> }
> return 0xff;
> + case SSI_SD_PREP_RESP:
> + DPRINTF("Prepare card response (Ncr)\n");
> + s->mode = SSI_SD_RESPONSE;
> + return 0xff;
> case SSI_SD_RESPONSE:
> if (s->stopping) {
> s->stopping = 0;
>
- [PATCH v2 00/25] hw/riscv: sifive_u: Add missing SPI support, Bin Meng, 2021/01/23
- [PATCH v2 02/25] hw/block: m25p80: Add various ISSI flash information, Bin Meng, 2021/01/23
- [PATCH v2 01/25] hw/block: m25p80: Add ISSI SPI flash support, Bin Meng, 2021/01/23
- [PATCH v2 03/25] hw/sd: ssi-sd: Fix incorrect card response sequence, Bin Meng, 2021/01/23
- Re: [PATCH v2 03/25] hw/sd: ssi-sd: Fix incorrect card response sequence,
Philippe Mathieu-Daudé <=
- [PATCH v2 04/25] hw/sd: sd: Support CMD59 for SPI mode, Bin Meng, 2021/01/23
- [PATCH v2 07/25] hw/sd: ssi-sd: Suffix a data block with CRC16, Bin Meng, 2021/01/23
- [PATCH v2 05/25] hw/sd: sd: Drop sd_crc16(), Bin Meng, 2021/01/23
- [PATCH v2 06/25] util: Add CRC16 (CCITT) calculation routines, Bin Meng, 2021/01/23