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Re: [PATCH v3 03/16] target/riscv: cpu: Set reset vector based on the co
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [PATCH v3 03/16] target/riscv: cpu: Set reset vector based on the configured property value |
Date: |
Tue, 1 Sep 2020 11:37:27 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 |
On 9/1/20 3:38 AM, Bin Meng wrote:
> From: Bin Meng <bin.meng@windriver.com>
>
> Now that we have the newly introduced 'resetvec' property in the
> RISC-V CPU and HART, instead of hard-coding the reset vector addr
> in the CPU's instance_init(), move that to riscv_cpu_realize()
> based on the configured property value from the RISC-V machines.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
> ---
>
> (no changes since v1)
>
> hw/riscv/opentitan.c | 1 +
> hw/riscv/sifive_e.c | 1 +
> hw/riscv/sifive_u.c | 2 ++
> target/riscv/cpu.c | 7 ++-----
> 4 files changed, 6 insertions(+), 5 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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