Re: [Qemu-riscv] [Qemu-devel] [PATCH for-4.1 3/8] target/riscv: Merge argument sets for insn32 and insn16

[Richard Henderson]

On 4/16/19 2:02 AM, Bastian Koppelmann wrote:
> 
> On 4/1/19 5:11 AM, Richard Henderson wrote:
>>     # *** RV64C Standard Extension (Quadrant 0) ***
>>   c_addi4spn        000    ........ ... 00 @ciw
>> -c_fld             001  ... ... .. ... 00 @cl_d
>> -c_lw              010  ... ... .. ... 00 @cl_w
>> +fld               001  ... ... .. ... 00 @cl_d
>> +lw                010  ... ... .. ... 00 @cl_w
> 
> This leads to a redefinition of arg_lw and arg_fld for which clang emits a
> warning as found by Peter as he wanted to merge the original pull request for
> RISC-V-dt. The same goes for all other merged args.

I thought that would be handled by the #pragma, but it seems
that we need another one for clang-6.


r~


diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index fb66e886bf..c96c616539 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -695,6 +695,7 @@ static bool gen_shift(DisasContext *ctx, arg_r *a,
  */
 #pragma GCC diagnostic push
 #pragma GCC diagnostic ignored "-Wredundant-decls"
+#pragma GCC diagnostic ignored "-Wtypedef-redefinition"

 #include "decode_insn16.inc.c"