Re: [Qemu-riscv] [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree

[no-reply]

Patchew URL: https://patchew.org/QEMU/address@hidden/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: address@hidden
Subject: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 t [tag update]            patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
57411c3df0 target/riscv: Remaining rvc insn reuse 32 bit translators
2b316ef6df target/riscv: Splice remaining compressed insn pairs for riscv32 vs 
riscv64
7c8f620985 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
3190c0d175 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
9804caa658 target/riscv: Convert @cs_2 insns to share translation functions
856bcfa746 target/riscv: Remove decode_RV32_64G()
087442ffb4 target/riscv: Remove gen_system()
553427a06a target/riscv: Rename trans_arith to gen_arith
548b9638bb target/riscv: Remove manual decoding of RV32/64M insn
4907b8b7d8 target/riscv: Remove shift and slt insn manual decoding
ee0ef5e44a target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
320faa091e target/riscv: Move gen_arith_imm() decoding into trans_* functions
5977392ef6 target/riscv: Remove manual decoding from gen_store()
0bfeeaed56 target/riscv: Remove manual decoding from gen_load()
a379dadde6 target/riscv: Remove manual decoding from gen_branch()
028d418d4b target/riscv: Remove gen_jalr()
133e6877ce target/riscv: Convert quadrant 2 of RVXC insns to decodetree
a50f8fbea2 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
4a72c7e887 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
213f1ee177 target/riscv: Convert RV priv insns to decodetree
5da98dc3d6 target/riscv: Convert RV64D insns to decodetree
93da015fd5 target/riscv: Convert RV32D insns to decodetree
50fc219371 target/riscv: Convert RV64F insns to decodetree
7f4494ad4b target/riscv: Convert RV32F insns to decodetree
a0645a0247 target/riscv: Convert RV64A insns to decodetree
18917ac52a target/riscv: Convert RV32A insns to decodetree
6ce00dee9a target/riscv: Convert RVXM insns to decodetree
5e79599aee target/riscv: Convert RVXI csr insns to decodetree
6db7a4cb0c target/riscv: Convert RVXI fence insns to decodetree
922467ba90 target/riscv: Convert RVXI arithmetic insns to decodetree
0b208e6923 target/riscv: Convert RV64I load/store insns to decodetree
2e06d08b59 target/riscv: Convert RV32I load/store insns to decodetree
0a5dab3195 target/riscv: Convert RVXI branch insns to decodetree
0f3720f4ef target/riscv: Activate decodetree and implemnt LUI & AUIPC

=== OUTPUT BEGIN ===
1/34 Checking commit 0f3720f4efb7 (target/riscv: Activate decodetree and 
implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1884:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 1/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

2/34 Checking commit 0a5dab319590 (target/riscv: Convert RVXI branch insns to 
decodetree)
3/34 Checking commit 2e06d08b59cb (target/riscv: Convert RV32I load/store insns 
to decodetree)
4/34 Checking commit 0b208e69236f (target/riscv: Convert RV64I load/store insns 
to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 4/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
5/34 Checking commit 922467ba9081 (target/riscv: Convert RVXI arithmetic insns 
to decodetree)
6/34 Checking commit 6db7a4cb0c7f (target/riscv: Convert RVXI fence insns to 
decodetree)
7/34 Checking commit 5e79599aeeb2 (target/riscv: Convert RVXI csr insns to 
decodetree)
8/34 Checking commit 6ce00dee9a01 (target/riscv: Convert RVXM insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48: 
new file mode 100644

total: 0 errors, 1 warnings, 169 lines checked

Patch 8/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
9/34 Checking commit 18917ac52a17 (target/riscv: Convert RV32A insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54: 
new file mode 100644

total: 0 errors, 1 warnings, 199 lines checked

Patch 9/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/34 Checking commit a0645a0247eb (target/riscv: Convert RV64A insns to 
decodetree)
11/34 Checking commit 7f4494ad4bc1 (target/riscv: Convert RV32F insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78: 
new file mode 100644

total: 0 errors, 1 warnings, 442 lines checked

Patch 11/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
12/34 Checking commit 50fc2193712b (target/riscv: Convert RV64F insns to 
decodetree)
13/34 Checking commit 93da015fd520 (target/riscv: Convert RV32D insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51: 
new file mode 100644

total: 0 errors, 1 warnings, 398 lines checked

Patch 13/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
14/34 Checking commit 5da98dc3d619 (target/riscv: Convert RV64D insns to 
decodetree)
15/34 Checking commit 213f1ee1775a (target/riscv: Convert RV priv insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 15/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
16/34 Checking commit 4a72c7e887ed (target/riscv: Convert quadrant 0 of RVXC 
insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31: 
new file mode 100644

ERROR: externs should be avoided in .c files
#251: FILE: target/riscv/translate.c:1072:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 231 lines checked

Patch 16/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

17/34 Checking commit a50f8fbea22c (target/riscv: Convert quadrant 1 of RVXC 
insns to decodetree)
18/34 Checking commit 133e6877ce81 (target/riscv: Convert quadrant 2 of RVXC 
insns to decodetree)
19/34 Checking commit 028d418d4b5b (target/riscv: Remove gen_jalr())
20/34 Checking commit a379dadde6af (target/riscv: Remove manual decoding from 
gen_branch())
21/34 Checking commit 0bfeeaed5620 (target/riscv: Remove manual decoding from 
gen_load())
22/34 Checking commit 5977392ef687 (target/riscv: Remove manual decoding from 
gen_store())
23/34 Checking commit 320faa091e79 (target/riscv: Move gen_arith_imm() decoding 
into trans_* functions)
24/34 Checking commit ee0ef5e44aa0 (target/riscv: make ADD/SUB/OR/XOR/AND insn 
use arg lists)
25/34 Checking commit 4907b8b7d898 (target/riscv: Remove shift and slt insn 
manual decoding)
26/34 Checking commit 548b9638bb0e (target/riscv: Remove manual decoding of 
RV32/64M insn)
27/34 Checking commit 553427a06aa7 (target/riscv: Rename trans_arith to 
gen_arith)
28/34 Checking commit 087442ffb48b (target/riscv: Remove gen_system())
29/34 Checking commit 856bcfa74672 (target/riscv: Remove decode_RV32_64G())
30/34 Checking commit 9804caa658dc (target/riscv: Convert @cs_2 insns to share 
translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42: 
new file mode 100644

ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:548:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 30/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

31/34 Checking commit 3190c0d17543 (target/riscv: Convert @cl_d, @cl_w, @cs_d, 
@cs_w insns)
32/34 Checking commit 7c8f620985ca (target/riscv: Splice fsw_sd and flw_ld for 
riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 32/34 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
33/34 Checking commit 2b316ef6df2e (target/riscv: Splice remaining compressed 
insn pairs for riscv32 vs riscv64)
34/34 Checking commit 57411c3df0c8 (target/riscv: Remaining rvc insn reuse 32 
bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to address@hidden