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[PATCH v12 12/23] target/arm: Handle NMI in arm_cpu_do_interrupt_aarch64
From: |
Jinjie Ruan |
Subject: |
[PATCH v12 12/23] target/arm: Handle NMI in arm_cpu_do_interrupt_aarch64() |
Date: |
Wed, 3 Apr 2024 10:16:00 +0000 |
According to Arm GIC section 4.6.3 Interrupt superpriority, the interrupt
with superpriority is always IRQ, never FIQ, so the NMI exception trap entry
behave like IRQ. And VINMI(vIRQ with Superpriority) can be raised from the
GIC or come from the hcrx_el2.HCRX_VINMI bit, VFNMI(vFIQ with Superpriority)
come from the hcrx_el2.HCRX_VFNMI bit.
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
v9:
- Update the commit message.
- Handle VINMI and VFNMI.
v7:
- Add Reviewed-by.
v6:
- Not combine VFNMI with CPU_INTERRUPT_VNMI.
v4:
- Also handle VNMI in arm_cpu_do_interrupt_aarch64().
v3:
- Remove the FIQ NMI handle.
---
target/arm/helper.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 65f2ddfa56..0455f20ccc 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11649,10 +11649,13 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs)
break;
case EXCP_IRQ:
case EXCP_VIRQ:
+ case EXCP_NMI:
+ case EXCP_VINMI:
addr += 0x80;
break;
case EXCP_FIQ:
case EXCP_VFIQ:
+ case EXCP_VFNMI:
addr += 0x100;
break;
case EXCP_VSERR:
--
2.34.1
- [PATCH v12 02/23] target/arm: Add PSTATE.ALLINT, (continued)
- [PATCH v12 02/23] target/arm: Add PSTATE.ALLINT, Jinjie Ruan, 2024/04/03
- [PATCH v12 18/23] hw/intc/arm_gicv3: Handle icv_nmiar1_read() for icc_nmiar1_read(), Jinjie Ruan, 2024/04/03
- [PATCH v12 13/23] hw/intc/arm_gicv3: Add has-nmi property to GICv3 device, Jinjie Ruan, 2024/04/03
- [PATCH v12 21/23] hw/intc/arm_gicv3: Report the VINMI interrupt, Jinjie Ruan, 2024/04/03
- [PATCH v12 19/23] hw/intc/arm_gicv3: Implement NMI interrupt priority, Jinjie Ruan, 2024/04/03
- [PATCH v12 17/23] hw/intc/arm_gicv3: Add NMI handling CPU interface registers, Jinjie Ruan, 2024/04/03
- [PATCH v12 12/23] target/arm: Handle NMI in arm_cpu_do_interrupt_aarch64(),
Jinjie Ruan <=
- [PATCH v12 16/23] hw/intc/arm_gicv3: Implement GICD_INMIR, Jinjie Ruan, 2024/04/03
- [PATCH v12 23/23] hw/arm/virt: Add FEAT_GICv3_NMI feature support in virt GIC, Jinjie Ruan, 2024/04/03
- [PATCH v12 22/23] target/arm: Add FEAT_NMI to max, Jinjie Ruan, 2024/04/03
- [PATCH v12 20/23] hw/intc/arm_gicv3: Report the NMI interrupt in gicv3_cpuif_update(), Jinjie Ruan, 2024/04/03
- Re: [PATCH v12 00/23] target/arm: Implement FEAT_NMI and FEAT_GICv3_NMI, Peter Maydell, 2024/04/04
- Re: [PATCH v12 00/23] target/arm: Implement FEAT_NMI and FEAT_GICv3_NMI, Peter Maydell, 2024/04/05