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[PULL 11/24] target/arm: Move be test for regime into S1TranslateResult
From: |
Peter Maydell |
Subject: |
[PULL 11/24] target/arm: Move be test for regime into S1TranslateResult |
Date: |
Thu, 20 Oct 2022 13:21:33 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
Hoist this test out of arm_ld[lq]_ptw into S1_ptw_translate.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20221011031911.2408754-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/ptw.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index 8fa0088d98d..c58788ac693 100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -19,6 +19,7 @@ typedef struct S1Translate {
bool in_secure;
bool in_debug;
bool out_secure;
+ bool out_be;
hwaddr out_phys;
} S1Translate;
@@ -277,6 +278,7 @@ static bool S1_ptw_translate(CPUARMState *env, S1Translate
*ptw,
ptw->out_secure = is_secure;
ptw->out_phys = addr;
+ ptw->out_be = regime_translation_big_endian(env, ptw->in_mmu_idx);
return true;
}
@@ -296,7 +298,7 @@ static uint32_t arm_ldl_ptw(CPUARMState *env, S1Translate
*ptw, hwaddr addr,
addr = ptw->out_phys;
attrs.secure = ptw->out_secure;
as = arm_addressspace(cs, attrs);
- if (regime_translation_big_endian(env, ptw->in_mmu_idx)) {
+ if (ptw->out_be) {
data = address_space_ldl_be(as, addr, attrs, &result);
} else {
data = address_space_ldl_le(as, addr, attrs, &result);
@@ -324,7 +326,7 @@ static uint64_t arm_ldq_ptw(CPUARMState *env, S1Translate
*ptw, hwaddr addr,
addr = ptw->out_phys;
attrs.secure = ptw->out_secure;
as = arm_addressspace(cs, attrs);
- if (regime_translation_big_endian(env, ptw->in_mmu_idx)) {
+ if (ptw->out_be) {
data = address_space_ldq_be(as, addr, attrs, &result);
} else {
data = address_space_ldq_le(as, addr, attrs, &result);
--
2.25.1
- [PULL 00/24] target-arm queue, Peter Maydell, 2022/10/20
- [PULL 01/24] hw/char/pl011: fix baud rate calculation, Peter Maydell, 2022/10/20
- [PULL 05/24] target/arm: Use probe_access_full for BTI, Peter Maydell, 2022/10/20
- [PULL 09/24] target/arm: Split out S1Translate type, Peter Maydell, 2022/10/20
- [PULL 03/24] target/arm: Enable TARGET_PAGE_ENTRY_EXTRA, Peter Maydell, 2022/10/20
- [PULL 02/24] target/arm: update the cortex-a15 MIDR to latest rev, Peter Maydell, 2022/10/20
- [PULL 23/24] target/arm: Enable TARGET_TB_PCREL, Peter Maydell, 2022/10/20
- [PULL 07/24] target/arm: Move ARMMMUIdx_Stage2 to a real tlb mmu_idx, Peter Maydell, 2022/10/20
- [PULL 11/24] target/arm: Move be test for regime into S1TranslateResult,
Peter Maydell <=
- [PULL 06/24] target/arm: Add ARMMMUIdx_Phys_{S,NS}, Peter Maydell, 2022/10/20
- [PULL 10/24] target/arm: Plumb debug into S1Translate, Peter Maydell, 2022/10/20
- [PULL 15/24] target/arm: Introduce curr_insn_len, Peter Maydell, 2022/10/20
- [PULL 17/24] target/arm: Change gen_*set_pc_im to gen_*update_pc, Peter Maydell, 2022/10/20
- [PULL 04/24] target/arm: Use probe_access_full for MTE, Peter Maydell, 2022/10/20
- [PULL 19/24] target/arm: Remove gen_exception_internal_insn pc argument, Peter Maydell, 2022/10/20
- [PULL 20/24] target/arm: Change gen_jmp* to work on displacements, Peter Maydell, 2022/10/20
- [PULL 22/24] target/arm: Introduce gen_pc_plus_diff for aarch32, Peter Maydell, 2022/10/20
- [PULL 16/24] target/arm: Change gen_goto_tb to work on displacements, Peter Maydell, 2022/10/20
- [PULL 18/24] target/arm: Change gen_exception_insn* to work on displacements, Peter Maydell, 2022/10/20