[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 25/28] hw/arm/boot: set CPTR_EL3.ESM and SCR_EL3.EnTP2 when bootin
From: |
Peter Maydell |
Subject: |
[PULL 25/28] hw/arm/boot: set CPTR_EL3.ESM and SCR_EL3.EnTP2 when booting Linux with EL3 |
Date: |
Mon, 10 Oct 2022 15:27:27 +0100 |
From: Jerome Forissier <jerome.forissier@linaro.org>
According to the Linux kernel booting.rst [1], CPTR_EL3.ESM and
SCR_EL3.EnTP2 must be initialized to 1 when EL3 is present and FEAT_SME
is advertised. This has to be taken care of when QEMU boots directly
into the kernel (i.e., "-M virt,secure=on -cpu max -kernel Image").
Cc: qemu-stable@nongnu.org
Fixes: 78cb9776662a ("target/arm: Enable SME for -cpu max")
Link: [1]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/arm64/booting.rst?h=v6.0#n321
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Message-id: 20221003145641.1921467-1-jerome.forissier@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/boot.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index ada2717f760..ee3858b673a 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -763,6 +763,10 @@ static void do_cpu_reset(void *opaque)
if (cpu_isar_feature(aa64_sve, cpu)) {
env->cp15.cptr_el[3] |= R_CPTR_EL3_EZ_MASK;
}
+ if (cpu_isar_feature(aa64_sme, cpu)) {
+ env->cp15.cptr_el[3] |= R_CPTR_EL3_ESM_MASK;
+ env->cp15.scr_el3 |= SCR_ENTP2;
+ }
/* AArch64 kernels never boot in secure mode */
assert(!info->secure_boot);
/* This hook is only supported for AArch32 currently:
--
2.25.1
- [PULL 12/28] target/arm: Merge regime_is_secure into get_phys_addr, (continued)
- [PULL 12/28] target/arm: Merge regime_is_secure into get_phys_addr, Peter Maydell, 2022/10/10
- [PULL 13/28] target/arm: Add is_secure parameter to do_ats_write, Peter Maydell, 2022/10/10
- [PULL 14/28] target/arm: Fold secure and non-secure a-profile mmu indexes, Peter Maydell, 2022/10/10
- [PULL 15/28] target/arm: Reorg regime_translation_disabled, Peter Maydell, 2022/10/10
- [PULL 17/28] target/arm: Introduce arm_hcr_el2_eff_secstate, Peter Maydell, 2022/10/10
- [PULL 19/28] target/arm: Remove env argument from combined_attrs_fwb, Peter Maydell, 2022/10/10
- [PULL 18/28] target/arm: Hoist read of *is_secure in S1_ptw_translate, Peter Maydell, 2022/10/10
- [PULL 21/28] target/arm: Fix ATS12NSO* from S PL1, Peter Maydell, 2022/10/10
- [PULL 20/28] target/arm: Pass HCR to attribute subroutines., Peter Maydell, 2022/10/10
- [PULL 22/28] target/arm: Split out get_phys_addr_disabled, Peter Maydell, 2022/10/10
- [PULL 25/28] hw/arm/boot: set CPTR_EL3.ESM and SCR_EL3.EnTP2 when booting Linux with EL3,
Peter Maydell <=
- [PULL 24/28] target/arm: Use tlb_set_page_full, Peter Maydell, 2022/10/10
- [PULL 26/28] target/arm: Don't allow guest to use unimplemented granule sizes, Peter Maydell, 2022/10/10
- [PULL 27/28] target/arm: Use ARMGranuleSize in ARMVAParameters, Peter Maydell, 2022/10/10
- [PULL 28/28] docs/system/arm/emulation.rst: Report FEAT_GTG support, Peter Maydell, 2022/10/10
- Re: [PULL 00/28] target-arm queue, Stefan Hajnoczi, 2022/10/12