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[PULL 05/13] target/i386: tcg: fix loading of registers from 16-bit TSS
From: |
Paolo Bonzini |
Subject: |
[PULL 05/13] target/i386: tcg: fix loading of registers from 16-bit TSS |
Date: |
Fri, 4 Jun 2021 17:17:37 +0200 |
According to the manual, the high 16-bit of the registers are preserved
when switching to a 16-bit task. Implement this in switch_tss_ra.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/tcg/seg_helper.c | 25 +++++++++++--------------
1 file changed, 11 insertions(+), 14 deletions(-)
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index 547b959689..2112c5fc51 100644
--- a/target/i386/tcg/seg_helper.c
+++ b/target/i386/tcg/seg_helper.c
@@ -277,8 +277,7 @@ static void switch_tss_ra(CPUX86State *env, int
tss_selector,
new_eip = cpu_lduw_kernel_ra(env, tss_base + 0x0e, retaddr);
new_eflags = cpu_lduw_kernel_ra(env, tss_base + 0x10, retaddr);
for (i = 0; i < 8; i++) {
- new_regs[i] = cpu_lduw_kernel_ra(env, tss_base + (0x12 + i * 2),
- retaddr) | 0xffff0000;
+ new_regs[i] = cpu_lduw_kernel_ra(env, tss_base + (0x12 + i * 2),
retaddr);
}
for (i = 0; i < 4; i++) {
new_segs[i] = cpu_lduw_kernel_ra(env, tss_base + (0x22 + i * 2),
@@ -391,19 +390,17 @@ static void switch_tss_ra(CPUX86State *env, int
tss_selector,
env->eip = new_eip;
eflags_mask = TF_MASK | AC_MASK | ID_MASK |
IF_MASK | IOPL_MASK | VM_MASK | RF_MASK | NT_MASK;
- if (!(type & 8)) {
- eflags_mask &= 0xffff;
+ if (type & 8) {
+ cpu_load_eflags(env, new_eflags, eflags_mask);
+ for (i = 0; i < 8; i++) {
+ env->regs[i] = new_regs[i];
+ }
+ } else {
+ cpu_load_eflags(env, new_eflags, eflags_mask & 0xffff);
+ for (i = 0; i < 8; i++) {
+ env->regs[i] = (env->regs[i] & 0xffff0000) | new_regs[i];
+ }
}
- cpu_load_eflags(env, new_eflags, eflags_mask);
- /* XXX: what to do in 16 bit case? */
- env->regs[R_EAX] = new_regs[0];
- env->regs[R_ECX] = new_regs[1];
- env->regs[R_EDX] = new_regs[2];
- env->regs[R_EBX] = new_regs[3];
- env->regs[R_ESP] = new_regs[4];
- env->regs[R_EBP] = new_regs[5];
- env->regs[R_ESI] = new_regs[6];
- env->regs[R_EDI] = new_regs[7];
if (new_eflags & VM_MASK) {
for (i = 0; i < 6; i++) {
load_seg_vm(env, i, new_segs[i]);
--
2.31.1
- [PULL 00/13] Misc bugfix patches for 2021-06-04, Paolo Bonzini, 2021/06/04
- [PULL 02/13] iscsi: link libm into the module, Paolo Bonzini, 2021/06/04
- [PULL 01/13] meson: allow optional dependencies for block modules, Paolo Bonzini, 2021/06/04
- [PULL 03/13] oslib-posix: Remove OpenBSD workaround for fcntl("/dev/null", F_SETFL, O_NONBLOCK) failure, Paolo Bonzini, 2021/06/04
- [PULL 04/13] target/i386: tcg: fix segment register offsets for 16-bit TSS, Paolo Bonzini, 2021/06/04
- [PULL 05/13] target/i386: tcg: fix loading of registers from 16-bit TSS,
Paolo Bonzini <=
- [PULL 08/13] tests/qtest/virtio-scsi-test: add unmap large LBA with 4k blocks test, Paolo Bonzini, 2021/06/04
- [PULL 07/13] target/i386: Fix decode of cr8, Paolo Bonzini, 2021/06/04
- [PULL 06/13] target/i386: tcg: fix switching from 16-bit to 32-bit tasks or vice versa, Paolo Bonzini, 2021/06/04
- [PULL 09/13] i386: reorder call to cpu_exec_realizefn, Paolo Bonzini, 2021/06/04
- [PULL 12/13] vl: plumb keyval-based options into -readconfig, Paolo Bonzini, 2021/06/04
- [PULL 10/13] i386: run accel_cpu_instance_init as post_init, Paolo Bonzini, 2021/06/04
- [PULL 11/13] qemu-config: parse configuration files to a QDict, Paolo Bonzini, 2021/06/04
- [PULL 13/13] vl: plug -object back into -readconfig, Paolo Bonzini, 2021/06/04
- Re: [PULL 00/13] Misc bugfix patches for 2021-06-04, Peter Maydell, 2021/06/05