Re: [Qemu-devel] [PATCH 0/6] target/mips: Amend MXU support

[Aleksandar Markovic]

> From: Aleksandar Markovic <address@hidden>
> Subject: [PATCH 0/6] target/mips: Amend MXU support
> 
> From: Aleksandar Markovic <address@hidden>
> 
> Various updates to MXU ASE support.
> 
> Aleksandar Markovic (6):
>  target/mips: MXU: Add missing opcodes/decoding for LX* instructions
>  target/mips: MXU: Add generic naming for optn2 constants
>  target/mips: MXU: Improve textual description
>  target/mips: MXU: Add handlers for logic instructions
>  target/mips: MXU: Add handlers for max/min instructions
>  target/mips: MXU: Add handlers for an align instruction

If there is no objection, to get things going a little, I am going to integrate 
patches 1, 2, and 3 into next MIPS pull request (scheduled shortly), while it 
looks other patches need more time for review.

(patch 1 is about "pool 17", issues around "pool 16" will be covered in a 
separate patch in v2)

Thanks to everyone,
Aleksandar