Re: [Qemu-devel] [PULL 00/34] MIPS queue for October 2018 - part 2

[Peter Maydell]

On 22 October 2018 at 13:57, Aleksandar Markovic
<address@hidden> wrote:
> From: Aleksandar Markovic <address@hidden>
>
> The following changes since commit b312532fd03413d0e6ae6767ec793a3e30f487b8:
>
>   Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into 
> staging (2018-10-19 19:01:07 +0100)
>
> are available in the git repository at:
>
>   https://github.com/AMarkovic/qemu tags/mips-queue-oct-2018-part-2
>
> for you to fetch changes up to 2ec219776c633df9e43c5fa1557f70ee4f735f9d:
>
>   target/mips: Fix decoding of ALIGN and DALIGN instructions (2018-10-22 
> 14:41:47 +0200)
>
> ----------------------------------------------------------------
> MIPS queue for October 2018 - part 2
>
> Limited support for R5900 ISA, MMI ASE, and two misc fixes.
>
> ----------------------------------------------------------------

Hi: I get compile errors on 32-bit hosts:

/home/petmay01/qemu-for-merges/disas/mips.c:615:35: error: large
integer implicitly truncated to unsigned type [-Werror=overflow]
 #define INSN_5900                 0x100000000
                                   ^
/home/petmay01/qemu-for-merges/disas/mips.c:1200:17: note: in
expansion of macro 'INSN_5900'
 #define EE      INSN_5900    /* Emotion Engine */
                 ^
/home/petmay01/qemu-for-merges/disas/mips.c:2326:73: note: in
expansion of macro 'EE'
 {"div1",    "z,s,t",  0x7000001a, 0xfc00ffff, RD_s | RD_t | WR_HILO, 0, EE },
                                                                         ^

(and repeats on other similar uses).

This is because this line is an initializer for "struct mips_opcode",
and the final field is "unsigned long membership", which may be only
32 bits wide, but you're trying to put a number in that's too big for that.

thanks
-- PMM