Re: [Qemu-devel] [PATCH v7 0/7] target/mips: Limited support for the R5900

[Aleksandar Markovic]

> From: Laurent Vivier <address@hidden>
> Sent: Friday, October 19, 2018 3:28 PM
> Subject: Re: [Qemu-devel] [PATCH v7 0/7] target/mips: Limited support for the 
> R5900
> 
> Le 15/10/2018 à 14:16, Aleksandar Markovic a écrit :
> >> From: Fredrik Noring <address@hidden>
> >> Sent: Saturday, October 13, 2018 1:09 PM
> >> To: Aleksandar Markovic; Maciej W. Rozycki; Philippe Mathieu-Daudé
> >> Cc: Richard Henderson; Aurelien Jarno; Petar Jovanovic; Peter Maydell; 
> >> Jürgen Urban; > > address@hidden
> >> Subject: [PATCH v7 0/7] target/mips: Limited support for the R5900
> >>
> >> The primary purpose of these changes is to support programs compiled
> >> by GCC for the R5900 target and thereby run R5900 Linux distributions,
> >> for example Gentoo.
> >>
> >
> > Hello, Fredrik.
> >
> > Your series is getting better and better with each version, which is very 
> > good. For a change,
> > I don't have any objection about the title. :) Patch 7 will be integrated 
> > shortly in the MIPS
> > queue, you don't need to worry about it. With this series you are not only 
> > supporting your 
> > prime use case, but you are introducing a new instruction set to QEMU. Try 
> > to step back and get
> > wider perspective. No matter how limited the support for the new ISA is, 
> > its introduction to
> > QEMU must have following elements:
> >
> > (1) Definition of basic preprocessor constants for the new ISA.
> > (2) All opcodes for the ISA.
> > (3) Basic decoding engine for new instructions.
> >
> > Your patch 1 adresses 1). However, there are no patches for (2) and (3) in 
> > this series. Let > me walk though the details on how to implement (2) and 
> > (3).
> >
> > (2) All opcodes for the ISA.
> 
> As Fredrik only wants to use R5900 gentoo userland binaries using qemu
> linux-user mode, does he really need to implement all the opcodes of the
> ISA?
>

It should be clear from my previous mail, but this is what I meant by (2) and 
(3):

(2) A list of all R5900 instructions not covered by MIPS III/IV, in the form of 
'#defines' or enum elements, logically clustered.

(3) A set of functions (in my estimation, around a dozen of them is needed), 
each containing a switch statement with cases for individual instructions, each 
case containing only "TODO" comment and raising EXCP_RI. Of course, all such 
function should be interconnected and integrated with the rest of MIPS code 
according to the R5900 doc.

In my view, it is really a stretch that this is 'very time consuming'. True, it 
does require focus and meticulousness.

My impression is that Fridrik understood my guidance correctly. Fridrik, please 
let me know if you need clarification of any kind.

Sincerely,
Aleksandar


> Most of the architectures have started with only the userland
> instruction set, and the privileged instruction set was added once this
> part was validated (see the risu project
> https://wiki.linaro.org/PeterMaydell/Risu). It was really helpful for me
> to add the m680x0 processor emulation in QEMU by this way (I've added
> FPU and MMU later)
> 
> It can be a lot of work to add all the opcodes for the ISA, and be very
> time consuming, and Fredrik has only test case for the opcode he has
> implemented, the rest of the ISA will not be tested, or will need more
> work from him.
> 
> So perhaps a not fully implemented R5900 ISA (with big WARNINGs in the
> code, and perhaps assert()?) would be better than nothing at all?
> 
> Thanks,
> Laurent
> 
> 
>