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Re: [Qemu-devel] [PATCH v1 06/12] net: cadence_gem: Add support for sele
From: |
Edgar E. Iglesias |
Subject: |
Re: [Qemu-devel] [PATCH v1 06/12] net: cadence_gem: Add support for selecting the DMA MemoryRegion |
Date: |
Mon, 8 Oct 2018 21:55:21 +0200 |
User-agent: |
Mutt/1.9.4 (2018-02-28) |
On Mon, Oct 08, 2018 at 01:30:20PM +0100, Peter Maydell wrote:
> On 3 October 2018 at 16:07, Edgar E. Iglesias <address@hidden> wrote:
> > From: "Edgar E. Iglesias" <address@hidden>
> >
> > Add support for selecting the Memory Region that the GEM
> > will do DMA to.
> >
> > Signed-off-by: Edgar E. Iglesias <address@hidden>
> > ---
> > hw/net/cadence_gem.c | 63
> > ++++++++++++++++++++++++++++----------------
> > include/hw/net/cadence_gem.h | 2 ++
> > 2 files changed, 43 insertions(+), 22 deletions(-)
> >
> > diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
> > index 759c1d7..ab02515 100644
> > --- a/hw/net/cadence_gem.c
> > +++ b/hw/net/cadence_gem.c
> > @@ -28,6 +28,7 @@
> > #include "hw/net/cadence_gem.h"
> > #include "qapi/error.h"
> > #include "qemu/log.h"
> > +#include "sysemu/dma.h"
> > #include "net/checksum.h"
> >
> > #ifdef CADENCE_GEM_ERR_DEBUG
> > @@ -835,9 +836,9 @@ static void gem_get_rx_desc(CadenceGEMState *s, int q)
> > {
> > DB_PRINT("read descriptor 0x%x\n", (unsigned)s->rx_desc_addr[q]);
> > /* read current descriptor */
> > - cpu_physical_memory_read(s->rx_desc_addr[q],
> > - (uint8_t *)s->rx_desc[q],
> > - sizeof(uint32_t) * gem_get_desc_len(s, true));
> > + address_space_read(s->dma_as, s->rx_desc_addr[q],
> > MEMTXATTRS_UNSPECIFIED,
> > + (uint8_t *)s->rx_desc[q],
> > + sizeof(uint32_t) * gem_get_desc_len(s, true));
>
> At some point you might want to add support for handling "descriptor
> read/write failed", incidentally: address_space_read/write return a
> MemTxResult which you can check for != MEMTX_OK.
Yes, the GEM can report those errors to SW so that's a nice feature to follow
up with.
Thanks,
Edgar
- Re: [Qemu-devel] [PATCH v1 04/12] net: cadence_gem: Add macro with max number of descriptor words, (continued)
- [Qemu-devel] [PATCH v1 05/12] net: cadence_gem: Add support for extended descriptors, Edgar E. Iglesias, 2018/10/03
- [Qemu-devel] [PATCH v1 06/12] net: cadence_gem: Add support for selecting the DMA MemoryRegion, Edgar E. Iglesias, 2018/10/03
- [Qemu-devel] [PATCH v1 07/12] net: cadence_gem: Implement support for 64bit descriptor addresses, Edgar E. Iglesias, 2018/10/03
- [Qemu-devel] [PATCH v1 08/12] net: cadence_gem: Announce 64bit addressing support, Edgar E. Iglesias, 2018/10/03
- [Qemu-devel] [PATCH v1 09/12] target-arm: powerctl: Enable HVC when starting CPUs to EL2, Edgar E. Iglesias, 2018/10/03
- [Qemu-devel] [PATCH v1 10/12] target/arm: Add the Cortex-A72, Edgar E. Iglesias, 2018/10/03