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[Qemu-commits] [qemu/qemu] ba1e81: target/mips: Add nanoMIPS CRC32 instr
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GitHub |
Subject: |
[Qemu-commits] [qemu/qemu] ba1e81: target/mips: Add nanoMIPS CRC32 instruction pool |
Date: |
Fri, 26 Oct 2018 14:15:11 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: ba1e81171fb761aea9a9a4ccadedf808e34eaae2
https://github.com/qemu/qemu/commit/ba1e81171fb761aea9a9a4ccadedf808e34eaae2
Author: Aleksandar Markovic <address@hidden>
Date: 2018-10-25 (Thu, 25 Oct 2018)
Changed paths:
M target/mips/translate.c
Log Message:
-----------
target/mips: Add nanoMIPS CRC32 instruction pool
Add nanoMIPS CRC32 instruction pool.
Reviewed-by: Stefan Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Commit: d046a9ea1b8877a570a8b12a2d0125ec59fe5b22
https://github.com/qemu/qemu/commit/d046a9ea1b8877a570a8b12a2d0125ec59fe5b22
Author: Dimitrije Nikolic <address@hidden>
Date: 2018-10-25 (Thu, 25 Oct 2018)
Changed paths:
M target/mips/translate.c
Log Message:
-----------
target/mips: Implement emulation of nanoMIPS EVA instructions
Implement emulation of nanoMIPS EVA instructions. They are all
part of P.LS.E0 instruction pool, or one of its subpools.
Reviewed-by: Stefan Markovic <address@hidden>
Signed-off-by: Dimitrije Nikolic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Commit: 89a955e8df3dba6f96859cd0339356243b6c996f
https://github.com/qemu/qemu/commit/89a955e8df3dba6f96859cd0339356243b6c996f
Author: Aleksandar Markovic <address@hidden>
Date: 2018-10-25 (Thu, 25 Oct 2018)
Changed paths:
M MAINTAINERS
M configure
M disas/Makefile.objs
A disas/nanomips.cpp
A disas/nanomips.h
M include/disas/bfd.h
M include/exec/poison.h
M target/mips/cpu.c
Log Message:
-----------
target/mips: Add disassembler support for nanoMIPS
Add disassembler support for nanoMIPS.
Reviewed-by: Stefan Markovic <address@hidden>
Signed-off-by: Matthew Fortune <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Commit: 179f9ac887973c818b2578bd79fa3ed2522657d4
https://github.com/qemu/qemu/commit/179f9ac887973c818b2578bd79fa3ed2522657d4
Author: Peter Maydell <address@hidden>
Date: 2018-10-26 (Fri, 26 Oct 2018)
Changed paths:
M MAINTAINERS
M configure
M disas/Makefile.objs
A disas/nanomips.cpp
A disas/nanomips.h
M include/disas/bfd.h
M include/exec/poison.h
M target/mips/cpu.c
M target/mips/translate.c
Log Message:
-----------
Merge remote-tracking branch
'remotes/amarkovic/tags/mips-queue-oct-2018-part-3' into staging
MIPS queue for October 2018 - part 3
# gpg: Signature made Thu 25 Oct 2018 21:14:02 BST
# gpg: using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <address@hidden>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65
* remotes/amarkovic/tags/mips-queue-oct-2018-part-3:
target/mips: Add disassembler support for nanoMIPS
target/mips: Implement emulation of nanoMIPS EVA instructions
target/mips: Add nanoMIPS CRC32 instruction pool
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/6e6ffc9ffa88...179f9ac88797
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