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Re: [PATCH v5 1/8] Implement STM32L4x5_RCC skeleton
From: |
Peter Maydell |
Subject: |
Re: [PATCH v5 1/8] Implement STM32L4x5_RCC skeleton |
Date: |
Mon, 26 Feb 2024 21:24:56 +0000 |
On Mon, 26 Feb 2024 at 19:21, Arnaud Minier
<arnaud.minier@telecom-paris.fr> wrote:
> > From: "Peter Maydell"
> >> +static const MemoryRegionOps stm32l4x5_rcc_ops = {
> >> + .read = stm32l4x5_rcc_read,
> >> + .write = stm32l4x5_rcc_write,
> >> + .endianness = DEVICE_NATIVE_ENDIAN,
> >> + .valid = {
> >> + .max_access_size = 4,
> >> + .unaligned = false
> >> + },
> >> +};
> >
> > What's the .valid.min_access_size ?
> > Do we need to set the .impl max/min access size here too ?
>
> I honestly don't really understand the differences between .valid and .impl.
> However, since all the code assumes that 4-byte accesses are made,
> I think we can set all these values to 4 for now.
.valid is "what is the guest allowed to do?". If the guest tries
something not permitted by the .valid settings, it gets a transaction
failure instead, which then becomes a bus fault or whatever the
architectural equivalent is.
.impl is "what does my device code implement?". If the guest tries
something that is permitted by .valid but not within the bounds
specified by .impl, the core memory subsystem will try to synthesise
it (eg handling a guest word write by doing 4 byte writes to the
device write function, if a 4-byte write is permitted by .valid
but .impl only permits 1 byte writes).
thanks
-- PMM
- [PATCH v5 0/8] Add device STM32L4x5 RCC, Arnaud Minier, 2024/02/19
- [PATCH v5 2/8] Add an internal clock multiplexer object, Arnaud Minier, 2024/02/19
- [PATCH v5 3/8] Add an internal PLL Clock object, Arnaud Minier, 2024/02/19
- [PATCH v5 4/8] Add initialization information for PLLs and clock multiplexers, Arnaud Minier, 2024/02/19
- [PATCH v5 5/8] RCC: Handle Register Updates, Arnaud Minier, 2024/02/19
- [PATCH v5 6/8] Add write protections to CR register, Arnaud Minier, 2024/02/19
- [PATCH v5 7/8] STM32L4x5: Use the RCC Sysclk, Arnaud Minier, 2024/02/19