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Re: [RFC PATCH 1/3] target/arm: Implement FEAT_NMI to support Non-maskab
From: |
Peter Maydell |
Subject: |
Re: [RFC PATCH 1/3] target/arm: Implement FEAT_NMI to support Non-maskable Interrupt |
Date: |
Tue, 20 Feb 2024 12:31:05 +0000 |
On Tue, 20 Feb 2024 at 12:19, Jinjie Ruan <ruanjinjie@huawei.com> wrote:
>
> Enable Non-maskable Interrupt feature.
>
> Enable HCRX register feature to support TALLINT read/write.
>
> Add support for enable/disable NMI at qemu startup as below:
>
> qemu-system-aarch64 -cpu cortex-a53/a57/a72/a76,nmi=[on/off]
>
> Add support for allint read/write as follow:
>
> mrs <xt>, ALLINT // read allint
> msr ALLINT, <xt> // write allint with imm
> msr ALLINT, #<imm> // write allint with 1 or 0
Can I ask you to break this patchset down into smaller
coherent pieces, please? When you write a commit message
that has this sort of "list of four different things the
patch does" structure, that's a sign that really it ought to
be multiple different patches that do one thing each.
Do we really need the command line option? Mostly we
don't add that for new CPU features, unless there's a
strong reason why users might need to turn it off: instead
we just implement it if the CPU type and/or the board has
the feature.
thanks
-- PMM