Re: [PATCH v1 1/3] {include/}hw/arm: refactor virt PPI logic

[Peter Maydell]

On Fri, 15 Sept 2023 at 12:56, Leif Lindholm <quic_llindhol@quicinc.com> wrote:
>
> GIC Private Peripheral Interrupts (PPI) are defined as GIC INTID 16-31.
> As in, PPI0 is INTID16 .. PPI15 is INTID31.
> Arm's Base System Architecture specification (BSA) lists the mandated and
> recommended private interrupt IDs by INTID, not by PPI index. But current
> definitions in virt define them by PPI index, complicating cross
> referencing.
>
> Meanwhile, the PPI(x) macro counterintuitively adds 16 to the input value,
> converting a PPI index to an INTID.
>
> Resolve this by redefining the BSA-allocated PPIs by their INTIDs,
> inverting the logic of the PPI(x) macro and flipping where it is used.

This patch changes the values of ARCH_TIMER_S_EL1_IRQ etc, but doesn't
change the code that writes those values into device tree properties, eg
in fdt_add_timer_nodes(). The device tree bindings want the actual PPI
numbers, not the INTIDs.

Plus keeping the PPI macro name but changing its function is
a bit fragile if we end up needing to backport a patch from after
this change to a QEMU release branch that predates it. If we want
to have the base values be INTIDs then probably the macro should
be INTID_TO_PPI() or similar.

thanks
-- PMM