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[PATCH v3 1/6] linux-user/aarch64: Handle EC_PCALIGNMENT
From: |
Richard Henderson |
Subject: |
[PATCH v3 1/6] linux-user/aarch64: Handle EC_PCALIGNMENT |
Date: |
Sun, 19 Sep 2021 19:44:59 -0700 |
This will shortly be raised for execution with a misaligned pc.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
linux-user/aarch64/cpu_loop.c | 44 +++++++++++++++++++++--------------
1 file changed, 27 insertions(+), 17 deletions(-)
diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c
index 11e34cb100..6e03afb2bd 100644
--- a/linux-user/aarch64/cpu_loop.c
+++ b/linux-user/aarch64/cpu_loop.c
@@ -78,7 +78,7 @@
void cpu_loop(CPUARMState *env)
{
CPUState *cs = env_cpu(env);
- int trapnr, ec, fsc, si_code;
+ int trapnr, ec, fsc, si_sig, si_code;
abi_long ret;
for (;;) {
@@ -112,28 +112,38 @@ void cpu_loop(CPUARMState *env)
break;
case EXCP_PREFETCH_ABORT:
case EXCP_DATA_ABORT:
- /* We should only arrive here with EC in {DATAABORT, INSNABORT}. */
ec = syn_get_ec(env->exception.syndrome);
- assert(ec == EC_DATAABORT || ec == EC_INSNABORT);
-
- /* Both EC have the same format for FSC, or close enough. */
- fsc = extract32(env->exception.syndrome, 0, 6);
- switch (fsc) {
- case 0x04 ... 0x07: /* Translation fault, level {0-3} */
- si_code = TARGET_SEGV_MAPERR;
+ switch (ec) {
+ case EC_DATAABORT:
+ case EC_INSNABORT:
+ /* Both EC have the same format for FSC, or close enough. */
+ fsc = extract32(env->exception.syndrome, 0, 6);
+ switch (fsc) {
+ case 0x04 ... 0x07: /* Translation fault, level {0-3} */
+ si_sig = TARGET_SIGSEGV;
+ si_code = TARGET_SEGV_MAPERR;
+ break;
+ case 0x09 ... 0x0b: /* Access flag fault, level {1-3} */
+ case 0x0d ... 0x0f: /* Permission fault, level {1-3} */
+ si_sig = TARGET_SIGSEGV;
+ si_code = TARGET_SEGV_ACCERR;
+ break;
+ case 0x11: /* Synchronous Tag Check Fault */
+ si_sig = TARGET_SIGSEGV;
+ si_code = TARGET_SEGV_MTESERR;
+ break;
+ default:
+ g_assert_not_reached();
+ }
break;
- case 0x09 ... 0x0b: /* Access flag fault, level {1-3} */
- case 0x0d ... 0x0f: /* Permission fault, level {1-3} */
- si_code = TARGET_SEGV_ACCERR;
- break;
- case 0x11: /* Synchronous Tag Check Fault */
- si_code = TARGET_SEGV_MTESERR;
+ case EC_PCALIGNMENT:
+ si_sig = TARGET_SIGBUS;
+ si_code = TARGET_BUS_ADRALN;
break;
default:
g_assert_not_reached();
}
-
- force_sig_fault(TARGET_SIGSEGV, si_code, env->exception.vaddress);
+ force_sig_fault(si_sig, si_code, env->exception.vaddress);
break;
case EXCP_DEBUG:
case EXCP_BKPT:
--
2.25.1
- [PATCH v3 0/6] target/arm: Fix insn exception priorities, Richard Henderson, 2021/09/19
- [PATCH v3 2/6] linux-user/arm: Report SIGBUS and SIGSEGV correctly, Richard Henderson, 2021/09/19
- [PATCH v3 1/6] linux-user/aarch64: Handle EC_PCALIGNMENT,
Richard Henderson <=
- [PATCH v3 4/6] target/arm: Assert thumb pc is aligned, Richard Henderson, 2021/09/19
- [PATCH v3 6/6] tests/tcg: Add arm and aarch64 pc alignment tests, Richard Henderson, 2021/09/19
- [PATCH v3 3/6] target/arm: Take an exception if PC is misaligned, Richard Henderson, 2021/09/19
- [PATCH v3 5/6] target/arm: Suppress bp for exceptions with more priority, Richard Henderson, 2021/09/19