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[PATCH v16 46/99] target/arm: fix comments style of fp_exception_el befo
From: |
Alex Bennée |
Subject: |
[PATCH v16 46/99] target/arm: fix comments style of fp_exception_el before moving it |
Date: |
Fri, 4 Jun 2021 16:52:19 +0100 |
From: Claudio Fontana <cfontana@suse.de>
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
target/arm/tcg/helper.c | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/target/arm/tcg/helper.c b/target/arm/tcg/helper.c
index 8372089260..d4cafdbd95 100644
--- a/target/arm/tcg/helper.c
+++ b/target/arm/tcg/helper.c
@@ -1625,13 +1625,15 @@ uint32_t HELPER(crc32c)(uint32_t acc, uint32_t val,
uint32_t bytes)
return crc32c(acc, buf, bytes) ^ 0xffffffff;
}
-/* Return the exception level to which FP-disabled exceptions should
+/*
+ * Return the exception level to which FP-disabled exceptions should
* be taken, or 0 if FP is enabled.
*/
int fp_exception_el(CPUARMState *env, int cur_el)
{
#ifndef CONFIG_USER_ONLY
- /* CPACR and the CPTR registers don't exist before v6, so FP is
+ /*
+ * CPACR and the CPTR registers don't exist before v6, so FP is
* always accessible
*/
if (!arm_feature(env, ARM_FEATURE_V6)) {
@@ -1654,7 +1656,8 @@ int fp_exception_el(CPUARMState *env, int cur_el)
return 0;
}
- /* The CPACR controls traps to EL1, or PL1 if we're 32 bit:
+ /*
+ * The CPACR controls traps to EL1, or PL1 if we're 32 bit:
* 0, 2 : trap EL0 and EL1/PL1 accesses
* 1 : trap only EL0 accesses
* 3 : trap no accesses
@@ -1701,7 +1704,8 @@ int fp_exception_el(CPUARMState *env, int cur_el)
}
}
- /* For the CPTR registers we don't need to guard with an ARM_FEATURE
+ /*
+ * For the CPTR registers we don't need to guard with an ARM_FEATURE
* check because zero bits in the registers mean "don't trap".
*/
--
2.20.1
- [PATCH v16 63/99] tests/qtest: skip bios-tables-test test_acpi_oem_fields_virt for KVM, (continued)
- [PATCH v16 63/99] tests/qtest: skip bios-tables-test test_acpi_oem_fields_virt for KVM, Alex Bennée, 2021/06/04
- [PATCH v16 54/99] target/arm: move TCGCPUOps to tcg/tcg-cpu.c, Alex Bennée, 2021/06/04
- [PATCH v16 95/99] hw/arm: add dependency on OR_IRQ for XLNX_VERSAL, Alex Bennée, 2021/06/04
- [PATCH v16 45/99] target/arm: move sve_exception_el out of TCG helpers, Alex Bennée, 2021/06/04
- [PATCH v16 72/99] target/arm: cpu-sve: rename functions according to module prefix, Alex Bennée, 2021/06/04
- [PATCH v16 46/99] target/arm: fix comments style of fp_exception_el before moving it,
Alex Bennée <=
- [PATCH v16 20/99] target/arm: tcg: move sysemu-only parts of debug_helper, Alex Bennée, 2021/06/04
- [PATCH v16 55/99] target/arm: move cpu_tcg to tcg/tcg-cpu-models.c, Alex Bennée, 2021/06/04
- [PATCH v16 37/99] target/arm: move sve_zcr_len_for_el to common_cpu, Alex Bennée, 2021/06/04
- [PATCH v16 34/99] target/arm: move arm_hcr_el2_eff from tcg/ to common_cpu, Alex Bennée, 2021/06/04
- [PATCH v16 17/99] arm: tcg: only build under CONFIG_TCG, Alex Bennée, 2021/06/04
- [PATCH v16 42/99] target/arm: split 32bit and 64bit arm dump state, Alex Bennée, 2021/06/04
- Re: [PATCH v16 00/99] arm tcg/kvm refactor and split with kvm only support, Philippe Mathieu-Daudé, 2021/06/08