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Re: [Qemu-arm] [PATCH 35/42] target/arm: Convert the VCVT-to-f16 insns t
From: |
Richard Henderson |
Subject: |
Re: [Qemu-arm] [PATCH 35/42] target/arm: Convert the VCVT-to-f16 insns to decodetree |
Date: |
Sat, 8 Jun 2019 14:10:12 -0500 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 |
On 6/6/19 12:46 PM, Peter Maydell wrote:
> Convert the VCVTT and VCVTB instructions which convert from
> f32 and f64 to f16 to decodetree.
>
> Since we're no longer constrained to the old decoder's style
> using cpu_F0s and cpu_F0d we can perform a direct 16 bit
> store of the right half of the input single-precision register
> rather than doing a load/modify/store sequence on the full
> 32 bits.
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> target/arm/translate-vfp.inc.c | 62 ++++++++++++++++++++++++++
> target/arm/translate.c | 79 +---------------------------------
> target/arm/vfp.decode | 6 +++
> 3 files changed, 69 insertions(+), 78 deletions(-)
Reviewed-by: Richard Henderson <address@hidden>
r~
- Re: [Qemu-arm] [PATCH 11/42] target/arm: Add helpers for VFP register loads and stores, (continued)
- [Qemu-arm] [PATCH 34/42] target/arm: Convert the VCVT-from-f16 insns to decodetree, Peter Maydell, 2019/06/06
- [Qemu-arm] [PATCH 42/42] target/arm: Fix short-vector increment behaviour, Peter Maydell, 2019/06/06
- [Qemu-arm] [PATCH 30/42] target/arm: Convert VNEG to decodetree, Peter Maydell, 2019/06/06
- [Qemu-arm] [PATCH 14/42] target/arm: Convert VFP two-register transfer insns to decodetree, Peter Maydell, 2019/06/06
- [Qemu-arm] [PATCH 35/42] target/arm: Convert the VCVT-to-f16 insns to decodetree, Peter Maydell, 2019/06/06
- Re: [Qemu-arm] [PATCH 35/42] target/arm: Convert the VCVT-to-f16 insns to decodetree,
Richard Henderson <=