There is one additional need which we just discovered with Fu Wei.
We need second secure UART for RAS and MM from EL0.
I'm adding a patch here (not sure if addresses and IRQ's are in your style so please check those).
I will adapt FW to your changes in next patch.
From fbc84e29b966f94a27fe84195987e6ba0c55c1bc Mon Sep 17 00:00:00 2001
Date: Thu, 4 Apr 2019 14:41:21 +0700
Subject: [PATCH] Add 2nd secure uart Rebase of Fu Wei patch
---
hw/arm/sbsa-ref.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 6b26111840..dcfb34ff5b 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -67,6 +67,7 @@ enum {
SBSA_PCIE_ECAM,
SBSA_GPIO,
SBSA_SECURE_UART,
+ SBSA_SECURE_UART_MM,
SBSA_SECURE_MEM,
SBSA_AHCI,
SBSA_EHCI,
@@ -105,7 +106,9 @@ static const MemMapEntry sbsa_ref_memmap[] = {
[SBSA_RTC] = { 0x60010000, 0x00001000 },
[SBSA_GPIO] = { 0x60020000, 0x00001000 },
[SBSA_SECURE_UART] = { 0x60030000, 0x00001000 },
- [SBSA_SMMU] = { 0x60040000, 0x00020000 },
+ /* The UART is a secure UART for S-EL0 OS testing */
+ [SBSA_SECURE_UART_MM] = { 0x60040000, 0x00001000 },
+ [SBSA_SMMU] = { 0x60050000, 0x00020000 },
/* Space here reserved for more SMMUs */
[SBSA_AHCI] = { 0x60100000, 0x00010000 },
[SBSA_EHCI] = { 0x60110000, 0x00010000 },
@@ -126,8 +129,9 @@ static const int sbsa_ref_irqmap[] = {
[SBSA_PCIE] = 3, /* ... to 6 */
[SBSA_GPIO] = 7,
[SBSA_SECURE_UART] = 8,
- [SBSA_AHCI] = 9,
- [SBSA_EHCI] = 10,
+ [SBSA_SECURE_UART_MM] = 9,
+ [SBSA_AHCI] = 10,
+ [SBSA_EHCI] = 11,
};
/*
@@ -645,6 +649,7 @@ static void sbsa_ref_init(MachineState *machine)
create_uart(vms, pic, SBSA_UART, sysmem, serial_hd(0));
create_uart(vms, pic, SBSA_SECURE_UART, secure_sysmem, serial_hd(1));
+ create_uart(vms, pic, SBSA_SECURE_UART_MM, secure_sysmem, serial_hd(2));
create_rtc(vms, pic);
--
2.17.1