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Re: [Qemu-arm] [PATCH 04/10] target/arm: Implement AArch32 HVBAR
From: |
Luc Michel |
Subject: |
Re: [Qemu-arm] [PATCH 04/10] target/arm: Implement AArch32 HVBAR |
Date: |
Wed, 15 Aug 2018 14:26:55 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.0 |
On 8/14/18 2:42 PM, Peter Maydell wrote:
> Implement the AArch32 HVBAR register; we can do this just by
> making the existing VBAR_EL2 regdefs be STATE_BOTH.
>
> Signed-off-by: Peter Maydell <address@hidden>
Reviewed-By: Luc Michel <address@hidden>
> ---
> target/arm/helper.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index 14fd78f587a..b6412fe9d1f 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -3750,7 +3750,7 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
>
> /* Used to describe the behaviour of EL2 regs when EL2 does not exist. */
> static const ARMCPRegInfo el3_no_el2_cp_reginfo[] = {
> - { .name = "VBAR_EL2", .state = ARM_CP_STATE_AA64,
> + { .name = "VBAR_EL2", .state = ARM_CP_STATE_BOTH,
> .opc0 = 3, .opc1 = 4, .crn = 12, .crm = 0, .opc2 = 0,
> .access = PL2_RW,
> .readfn = arm_cp_read_zero, .writefn = arm_cp_write_ignore },
> @@ -3899,7 +3899,7 @@ static const ARMCPRegInfo el2_cp_reginfo[] = {
> .opc0 = 3, .opc1 = 4, .crn = 4, .crm = 0, .opc2 = 0,
> .access = PL2_RW,
> .fieldoffset = offsetof(CPUARMState, banked_spsr[BANK_HYP]) },
> - { .name = "VBAR_EL2", .state = ARM_CP_STATE_AA64,
> + { .name = "VBAR_EL2", .state = ARM_CP_STATE_BOTH,
> .opc0 = 3, .opc1 = 4, .crn = 12, .crm = 0, .opc2 = 0,
> .access = PL2_RW, .writefn = vbar_write,
> .fieldoffset = offsetof(CPUARMState, cp15.vbar_el[2]),
>
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- Re: [Qemu-arm] [PATCH 03/10] target/arm: Implement RAZ/WI HACTLR2, (continued)
- [Qemu-arm] [PATCH 01/10] target/arm: Correct typo in HAMAIR1 regdef name, Peter Maydell, 2018/08/14
- [Qemu-arm] [PATCH 05/10] target/arm: Implement AArch32 HCR and HCR2, Peter Maydell, 2018/08/14
- [Qemu-arm] [PATCH 04/10] target/arm: Implement AArch32 HVBAR, Peter Maydell, 2018/08/14
- [Qemu-arm] [PATCH 10/10] target/arm: Implement support for taking exceptions to Hyp mode, Peter Maydell, 2018/08/14
- [Qemu-arm] [PATCH 09/10] target/arm: Implement AArch32 ERET instruction, Peter Maydell, 2018/08/14
- [Qemu-arm] [PATCH 02/10] target/arm: Add missing .cp = 15 to HMAIR1 and HAMAIR1 regdefs, Peter Maydell, 2018/08/14