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From: | Richard Henderson |
Subject: | Re: [Qemu-arm] [Qemu-devel] [PATCH v2 16/32] arm/translate-a64: add FP16 x2 ops for simd_indexed |
Date: | Thu, 8 Feb 2018 14:10:31 -0800 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 |
On 02/08/2018 09:31 AM, Alex Bennée wrote: > A bunch of the vectorised bitwise operations just operate on larger > chunks at a time. We can do the same for the new half-precision > operations by introducing some TWOHALFOP helpers which work on each > half of a pair of half-precision operations at once. > > Hopefully all this hoop jumping will get simpler once we have > generically vectorised helpers here. > > Signed-off-by: Alex Bennée <address@hidden> > > --- > v2 > - checkpatch fixes > --- > target/arm/helper-a64.c | 46 > +++++++++++++++++++++++++++++++++++++++++++++- > target/arm/helper-a64.h | 10 ++++++++++ > target/arm/translate-a64.c | 36 +++++++++++++++++++++++++++++------- > 3 files changed, 84 insertions(+), 8 deletions(-) Reviewed-by: Richard Henderson <address@hidden> r~
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