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Re: [Qemu-arm] [PATCH 00/13] i.MX FEC and SD changes
From: |
Peter Maydell |
Subject: |
Re: [Qemu-arm] [PATCH 00/13] i.MX FEC and SD changes |
Date: |
Tue, 12 Dec 2017 17:40:13 +0000 |
On 11 December 2017 at 21:29, Andrey Smirnov <address@hidden> wrote:
> Hi everyone,
>
> This patchset is a spin-off from original i.MX7 support submission
> found here [1], containing all of the patchest that are more or less
> agreed upon and are ready (hopefully!) for inclusion.
>
> Changes since [1]:
>
> - Rx buffer in FEC was moved from stack to heap to allow
> worry-free expansion to 16K limit.
>
> - Added more comments explaining rather convoluted bit-moving
> in eSHDC emuation code
>
> - Triple Tx ring DMA "VMState" code was changed to follow
> Peter's recommendations (avoiding the need to incrememnt the
> version_id)
>
> - FSL_IMX25_FEC_SIZE is used as a size of FEC's register file
>
> - Removed leftover code from "imx_fec: Change queue flushing
> heuristics"
>
> [1] https://lists.gnu.org/archive/html/qemu-arm/2017-11/msg00045.html
Hi; thanks for sending this set separately. Patch 4 ("Move Tx frame buffer
away from the stack") seems to have got lost -- it isn't in the mailing
list archives or my mailbox. Could you try resending that one?
Incidentally we should use the new i.MX SDHCI controller in the
imx6: coincidentally somebody ran into this bug recently:
https://stackoverflow.com/questions/47538951/qemu-freescale-i-mx6-duallite-sabre-root-filesystem-does-not-mount/47552596
I'll retest that this patchset works with my imx6 image, and
send a patch to sit on top of it to switch imx6 over to TYPE_IMX_USDHC.
thanks
-- PMM
- [Qemu-arm] [PATCH 11/13] imx_fec: Reserve full FSL_IMX25_FEC_SIZE page for the register file, (continued)
[Qemu-arm] [PATCH 10/13] imx_fec: Fix a typo in imx_enet_receive(), Andrey Smirnov, 2017/12/11
Re: [Qemu-arm] [PATCH 00/13] i.MX FEC and SD changes,
Peter Maydell <=