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[Qemu-arm] [PATCH 2/2] hw/arm: Integrate ADC model into Aspeed SoC
From: |
Andrew Jeffery |
Subject: |
[Qemu-arm] [PATCH 2/2] hw/arm: Integrate ADC model into Aspeed SoC |
Date: |
Sat, 20 May 2017 08:26:53 +0800 |
Signed-off-by: Andrew Jeffery <address@hidden>
---
hw/arm/aspeed_soc.c | 15 +++++++++++++++
include/hw/arm/aspeed_soc.h | 2 ++
2 files changed, 17 insertions(+)
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index 5c667d2c35b6..11f9588720d2 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -31,6 +31,7 @@
#define ASPEED_SOC_VIC_BASE 0x1E6C0000
#define ASPEED_SOC_SDMC_BASE 0x1E6E0000
#define ASPEED_SOC_SCU_BASE 0x1E6E2000
+#define ASPEED_SOC_ADC_BASE 0x1E6E9000
#define ASPEED_SOC_SRAM_BASE 0x1E720000
#define ASPEED_SOC_TIMER_BASE 0x1E782000
#define ASPEED_SOC_WDT_BASE 0x1E785000
@@ -157,6 +158,10 @@ static void aspeed_soc_init(Object *obj)
object_property_add_alias(obj, "hw-strap2", OBJECT(&s->scu),
"hw-strap2", &error_abort);
+ object_initialize(&s->adc, sizeof(s->adc), TYPE_ASPEED_ADC);
+ object_property_add_child(obj, "adc", OBJECT(&s->adc), NULL);
+ qdev_set_parent_bus(DEVICE(&s->adc), sysbus_get_default());
+
object_initialize(&s->fmc, sizeof(s->fmc), sc->info->fmc_typename);
object_property_add_child(obj, "fmc", OBJECT(&s->fmc), NULL);
qdev_set_parent_bus(DEVICE(&s->fmc), sysbus_get_default());
@@ -256,6 +261,16 @@ static void aspeed_soc_realize(DeviceState *dev, Error
**errp)
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->scu), 0, ASPEED_SOC_SCU_BASE);
+ /* ADC */
+ object_property_set_bool(OBJECT(&s->adc), true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->adc), 0, ASPEED_SOC_ADC_BASE);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0,
+ qdev_get_gpio_in(DEVICE(&s->vic), 31));
+
/* UART - attach an 8250 to the IO space as our UART5 */
if (serial_hds[0]) {
qemu_irq uart5 = qdev_get_gpio_in(DEVICE(&s->vic), uart_irqs[4]);
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index d16205c66b5f..3b4d66d30f08 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -15,6 +15,7 @@
#include "hw/arm/arm.h"
#include "hw/intc/aspeed_vic.h"
#include "hw/misc/aspeed_scu.h"
+#include "hw/adc/aspeed_adc.h"
#include "hw/misc/aspeed_sdmc.h"
#include "hw/timer/aspeed_timer.h"
#include "hw/i2c/aspeed_i2c.h"
@@ -37,6 +38,7 @@ typedef struct AspeedSoCState {
AspeedTimerCtrlState timerctrl;
AspeedI2CState i2c;
AspeedSCUState scu;
+ AspeedADCState adc;
AspeedSMCState fmc;
AspeedSMCState spi[ASPEED_SPIS_NUM];
AspeedSDMCState sdmc;
--
2.9.3
- [Qemu-arm] [PATCH 0/2] hw/adc: Implement a basic Aspeed ADC model, Andrew Jeffery, 2017/05/19
- [Qemu-arm] [PATCH 1/2] hw/adc: Add basic Aspeed ADC model, Andrew Jeffery, 2017/05/19
- Re: [Qemu-arm] [PATCH 1/2] hw/adc: Add basic Aspeed ADC model, Philippe Mathieu-Daudé, 2017/05/19
- Re: [Qemu-arm] [PATCH 1/2] hw/adc: Add basic Aspeed ADC model, Andrew Jeffery, 2017/05/21
- Re: [Qemu-arm] [PATCH 1/2] hw/adc: Add basic Aspeed ADC model, Ryan Chen, 2017/05/22
- Re: [Qemu-arm] [PATCH 1/2] hw/adc: Add basic Aspeed ADC model, Andrew Jeffery, 2017/05/22
- Re: [Qemu-arm] [PATCH 1/2] hw/adc: Add basic Aspeed ADC model, Philippe Mathieu-Daudé, 2017/05/24
- Re: [Qemu-arm] [PATCH 1/2] hw/adc: Add basic Aspeed ADC model, Andrew Jeffery, 2017/05/24
[Qemu-arm] [PATCH 2/2] hw/arm: Integrate ADC model into Aspeed SoC,
Andrew Jeffery <=
Re: [Qemu-arm] [Qemu-devel] [PATCH 0/2] hw/adc: Implement a basic Aspeed ADC model, no-reply, 2017/05/19