[Bug optimization/14504] Missed Bit Twiddling Optimization

[falk at debian dot org]

------- Additional Comments From falk at debian dot org  2004-03-11 22:10 
-------
My comment posted to gcc-bugs didn't make it into bugzilla, so I'll repeat it.

This is not universally a win. For example, on an Alpha EV5, the first:

andnot  a2,a1,t1
or      a2,a1,v0
cmoveq  a0,t1,v0

takes 2 cycles, and the second:

lda     t1,-1(a0)
xor     a2,t1,v0
or      a1,v0,t0
xor     t0,t1,v0

takes 4 cycles and 1 more insn. I suspect on i386 it'd be similar if
you enable conditional moves.

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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=14504