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Re: [Discuss-gnuradio] Building an RF Front end for DSP FPGA Kits with A
From: |
Moeller |
Subject: |
Re: [Discuss-gnuradio] Building an RF Front end for DSP FPGA Kits with ADCs |
Date: |
Wed, 19 Jan 2011 00:16:48 +0100 |
User-agent: |
Mozilla/5.0 (Windows; U; Windows NT 5.1; en-US; rv:1.9.2.13) Gecko/20101207 Thunderbird/3.1.7 |
On 18.01.2011 23:37, JP234 wrote:
>
> Moeller: Yes I am trying to solve the near-far problem. I have used the
> USRP radios to test the concept, and it works really well I am getting about
> 55 - 60 dB suppression which is essentially equal to the practical dynamic
> range of the ADCs for the USRP1. I would insert about 1 MHz of white
> Gaussian noise at about 50 dB higher than a NBFM signal on the same
> frequency band. There are still some problems with it though. I believe
> for highly-nonstationary interfering signals (signals that are on and off
> constantly with a short duration in between) it might not work.
The near-far problem is known for DSSS (direct sequence spread spectrum).
I never heard of it in the context of NBFM. How can you reconstruct NBFM
signals from below the noise floor?
For on-off jammers or high-power TDMA interferers there are chances to
get the weak signal in the quite moments (gated attenuation?).
> However, my solution doesn't fix the problem where the ADC is completely
> saturated, which according to wikipedia is the case for CDMA. Perhaps as I
> continue studying, at some point I will extend my project to this level.
I think you should read the appropriate literature, like
Simon, Omura, Scholz "Spread Spectrum Communications Handbook"
Wikipedia is not very detailed, a very good Encyklopedia, but not a substitute
for a text book.
> Marcus: The USRP most likely will not have enough logic cells to handle the
> amount of programming I need to do =D. I have USRP1, and the 12-bit ADC is
> also a limitation. It would also be more expensive for me to go with the
I think it needs some other tricks than just adding a few bits of resolution.
At first you should exactly define what you want.
> higher USRPs because I need two receive inputs and a transmit port all
> working at the same time while as for the Altera FPGA already comes with 2
> ADC inputs and 2 DACs, and it just needs an RF frontend, which would be a
> nice homebrew project. ;)
What's the bandwidth of the Altera ADC inputs? I guess it's not very wide.
But with an open design RF frontend it would be easier to modify it,
possibly with a circuit to protect it from saturation or destruction
(gated attenuation for high-power or on-off jammers).