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Re: [Discuss-gnuradio] Reducing the ADC sample rate
From: |
Eric Blossom |
Subject: |
Re: [Discuss-gnuradio] Reducing the ADC sample rate |
Date: |
Mon, 14 Nov 2005 15:29:39 -0800 |
User-agent: |
Mutt/1.5.6i |
On Mon, Nov 14, 2005 at 06:17:16PM -0500, address@hidden wrote:
> On Fri, 11 Nov 2005 11:42:18 -0800, Eric responded:
>
> I just saw that in the schematic that the AD9862 gets its clock dirrectly
> from the VCTCXO.
>
> Is there any other way to decrease the sample rate beside the decim_rate?
The ADCs always run at the oscillator rate (low jitter).
decim_rate sets how much decimation is done in the FPGA. You can of
course perform additional decimation in software. You'd probably want
to use gr.fir_filter_ccf for that job. The first argument is the
decimation rate.
Eric
- [Discuss-gnuradio] Reducing the ADC sample rate, address@hidden, 2005/11/11
- RE: [Discuss-gnuradio] Reducing the ADC sample rate, Robitaille, Michael, 2005/11/15
- RE: [Discuss-gnuradio] Reducing the ADC sample rate, Robitaille, Michael, 2005/11/15
- RE: [Discuss-gnuradio] Reducing the ADC sample rate, Robitaille, Michael, 2005/11/15
- RE: [Discuss-gnuradio] Reducing the ADC sample rate, address@hidden, 2005/11/15