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[Discuss-gnuradio] Re: FPGA Verilog code
From: |
Eric Blossom |
Subject: |
[Discuss-gnuradio] Re: FPGA Verilog code |
Date: |
Sat, 16 Jul 2005 18:33:25 -0700 |
User-agent: |
Mutt/1.5.6i |
On Fri, Jul 15, 2005 at 06:05:25PM -0500, Ahmad Sheikh wrote:
> Hi,
>
> I am interested in modifying the FPGA code in the USRP, and I would like to
> know the procedure used to create the Verilog code. Was the Verilog code
> written from scratch, or was some tool, like MATLAB/Simulink, used to
> convert signal processing algorithms to Verilog. If so, can I have access
> to the MDL files, and any documentation you might have?
>
> Thanks,
> Ahmad Sheikh
It was written by hand.
The top level of the design is usrp/fpga/toplevel/usrp_std/usrp_std.v
The rest of the code is in usrp/fpga/sdr_lib/*.v
Eric
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