Quoting David Carr <address@hidden>:
Hey all,
I'm looking for some more information of the FPGA on the USRP. I
understand the firmware implements 2 up and 2 down converters and some
general interface functionality. I assume these are of the CIC type.
What sort of FPGA resources are required? (How much logic is used in
the current device?)
There are CIC interpolators and decimators, CORDIC up and downconverters,
halfband interpolators and decimators, fifos and other interfacing stuff right
now. More to come.
Also, it appears from the wiki that you're using JHDL to code the
firmware, is the source available?
I've never heard of JHDL. I can assure you that I am using Verilog, and all the
source is available from the CVS tree on opensdr.sf.net
Matt
P.S. A preliminary run of 20 of the final USRP is in production right now, and
when those turn out ok, we're going to start full-scale production.
_______________________________________________
Discuss-gnuradio mailing list
address@hidden
http://lists.gnu.org/mailman/listinfo/discuss-gnuradio