Re: No support for hardware single step in gdb?

[Art Berggreen]

Peter Reilley wrote:
> This problem is seen in the 8260 chip only.   I have the IBM 403 chip
> working OK with the current way of handling istep.   On the
> 8260 it seems that the instruction queue has already read the
> breakpoint instruction from memory and restoring the original
> instruction to memory does not cause the queue to be flushed
> and the correct data to be read.

Is it an instruction pipeline issue or an instruction cache problem?
If your machine has an I cache which is enabled, you have to be sure
that you flush and invalidate your caches when resuming execution.

Art