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[avr-libc-commit] [2155] 2010-06-09 Eric B.
|
From: |
Eric Weddington |
|
Subject: |
[avr-libc-commit] [2155] 2010-06-09 Eric B. |
|
Date: |
Thu, 10 Jun 2010 03:59:26 +0000 |
Revision: 2155
http://svn.sv.gnu.org/viewvc/?view=rev&root=avr-libc&revision=2155
Author: arcanum
Date: 2010-06-10 03:59:26 +0000 (Thu, 10 Jun 2010)
Log Message:
-----------
2010-06-09 Eric B. Weddington <address@hidden>
Fix for bug #26767.
* include/avr/iox256a3b.h: Added corrected names for GPIO registers.
* include/avr/iox128a1.h: Same.
* include/avr/iox128a3.h: Same.
* include/avr/iox16a4.h: Same.
* include/avr/iox16d4.h: Same.
* include/avr/iox192a3.h: Same.
* include/avr/iox256a3.h: Same.
* include/avr/iox32a4.h: Same.
* include/avr/iox64a1.h: Same.
* include/avr/iox64a3.h: Same.
Ticket Links:
:-----------
http://savannah.gnu.org/bugs/?26767
Modified Paths:
--------------
trunk/avr-libc/ChangeLog
trunk/avr-libc/NEWS
trunk/avr-libc/include/avr/iox128a1.h
trunk/avr-libc/include/avr/iox128a3.h
trunk/avr-libc/include/avr/iox16a4.h
trunk/avr-libc/include/avr/iox16d4.h
trunk/avr-libc/include/avr/iox192a3.h
trunk/avr-libc/include/avr/iox256a3.h
trunk/avr-libc/include/avr/iox256a3b.h
trunk/avr-libc/include/avr/iox32a4.h
trunk/avr-libc/include/avr/iox64a1.h
trunk/avr-libc/include/avr/iox64a3.h
Modified: trunk/avr-libc/ChangeLog
===================================================================
--- trunk/avr-libc/ChangeLog 2010-06-09 22:48:58 UTC (rev 2154)
+++ trunk/avr-libc/ChangeLog 2010-06-10 03:59:26 UTC (rev 2155)
@@ -1,5 +1,19 @@
2010-06-09 Eric B. Weddington <address@hidden>
+ Fix for bug #26767.
+ * include/avr/iox256a3b.h: Added corrected names for GPIO registers.
+ * include/avr/iox128a1.h: Same.
+ * include/avr/iox128a3.h: Same.
+ * include/avr/iox16a4.h: Same.
+ * include/avr/iox16d4.h: Same.
+ * include/avr/iox192a3.h: Same.
+ * include/avr/iox256a3.h: Same.
+ * include/avr/iox32a4.h: Same.
+ * include/avr/iox64a1.h: Same.
+ * include/avr/iox64a3.h: Same.
+
+2010-06-09 Eric B. Weddington <address@hidden>
+
Fix for bug #28582.
* include/avr/iox256a3b.h: Add 3 missing double-word registers.
* NEWS: Add to fixed bugs list.
Modified: trunk/avr-libc/NEWS
===================================================================
--- trunk/avr-libc/NEWS 2010-06-09 22:48:58 UTC (rev 2154)
+++ trunk/avr-libc/NEWS 2010-06-10 03:59:26 UTC (rev 2155)
@@ -99,6 +99,7 @@
[#26188] Wrong or missing definition of SIGNATURE_X in iom644.h and others
[#26284] boot_lock_fuse_bits_get does not compile under gcc 4.3.X
[#26308] WDE defined as WDE3 in io90pwm3b.h and io90pwm2b.h
+ [#26767] XMEGA GPIO register name discrepancy
[#26809] Some common math constants missing in math.h
[#26840] Missing #define in iom32m1.h
[#26876] include io.h into fuse.h
Modified: trunk/avr-libc/include/avr/iox128a1.h
===================================================================
--- trunk/avr-libc/include/avr/iox128a1.h 2010-06-09 22:48:58 UTC (rev
2154)
+++ trunk/avr-libc/include/avr/iox128a1.h 2010-06-10 03:59:26 UTC (rev
2155)
@@ -1,4 +1,4 @@
-/* Copyright (c) 2009 Atmel Corporation
+/* Copyright (c) 2009-2010 Atmel Corporation
All rights reserved.
Redistribution and use in source and binary forms, with or without
@@ -50,6 +50,24 @@
/* Ungrouped common registers */
+#define GPIOR0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */
+#define GPIOR1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */
+#define GPIOR2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */
+#define GPIOR3 _SFR_MEM8(0x0003) /* General Purpose IO Register 3 */
+#define GPIOR4 _SFR_MEM8(0x0004) /* General Purpose IO Register 4 */
+#define GPIOR5 _SFR_MEM8(0x0005) /* General Purpose IO Register 5 */
+#define GPIOR6 _SFR_MEM8(0x0006) /* General Purpose IO Register 6 */
+#define GPIOR7 _SFR_MEM8(0x0007) /* General Purpose IO Register 7 */
+#define GPIOR8 _SFR_MEM8(0x0008) /* General Purpose IO Register 8 */
+#define GPIOR9 _SFR_MEM8(0x0009) /* General Purpose IO Register 9 */
+#define GPIORA _SFR_MEM8(0x000A) /* General Purpose IO Register 10 */
+#define GPIORB _SFR_MEM8(0x000B) /* General Purpose IO Register 11 */
+#define GPIORC _SFR_MEM8(0x000C) /* General Purpose IO Register 12 */
+#define GPIORD _SFR_MEM8(0x000D) /* General Purpose IO Register 13 */
+#define GPIORE _SFR_MEM8(0x000E) /* General Purpose IO Register 14 */
+#define GPIORF _SFR_MEM8(0x000F) /* General Purpose IO Register 15 */
+
+/* Deprecated */
#define GPIO0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */
#define GPIO1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */
#define GPIO2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */
@@ -2613,6 +2631,24 @@
/* ========== Flattened fully qualified IO register names ========== */
/* GPIO - General Purpose IO Registers */
+#define GPIO_GPIOR0 _SFR_MEM8(0x0000)
+#define GPIO_GPIOR1 _SFR_MEM8(0x0001)
+#define GPIO_GPIOR2 _SFR_MEM8(0x0002)
+#define GPIO_GPIOR3 _SFR_MEM8(0x0003)
+#define GPIO_GPIOR4 _SFR_MEM8(0x0004)
+#define GPIO_GPIOR5 _SFR_MEM8(0x0005)
+#define GPIO_GPIOR6 _SFR_MEM8(0x0006)
+#define GPIO_GPIOR7 _SFR_MEM8(0x0007)
+#define GPIO_GPIOR8 _SFR_MEM8(0x0008)
+#define GPIO_GPIOR9 _SFR_MEM8(0x0009)
+#define GPIO_GPIORA _SFR_MEM8(0x000A)
+#define GPIO_GPIORB _SFR_MEM8(0x000B)
+#define GPIO_GPIORC _SFR_MEM8(0x000C)
+#define GPIO_GPIORD _SFR_MEM8(0x000D)
+#define GPIO_GPIORE _SFR_MEM8(0x000E)
+#define GPIO_GPIORF _SFR_MEM8(0x000F)
+
+/* Deprecated */
#define GPIO_GPIO0 _SFR_MEM8(0x0000)
#define GPIO_GPIO1 _SFR_MEM8(0x0001)
#define GPIO_GPIO2 _SFR_MEM8(0x0002)
Modified: trunk/avr-libc/include/avr/iox128a3.h
===================================================================
--- trunk/avr-libc/include/avr/iox128a3.h 2010-06-09 22:48:58 UTC (rev
2154)
+++ trunk/avr-libc/include/avr/iox128a3.h 2010-06-10 03:59:26 UTC (rev
2155)
@@ -1,4 +1,4 @@
-/* Copyright (c) 2009 Atmel Corporation
+/* Copyright (c) 2009-2010 Atmel Corporation
All rights reserved.
Redistribution and use in source and binary forms, with or without
@@ -50,6 +50,24 @@
/* Ungrouped common registers */
+#define GPIOR0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */
+#define GPIOR1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */
+#define GPIOR2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */
+#define GPIOR3 _SFR_MEM8(0x0003) /* General Purpose IO Register 3 */
+#define GPIOR4 _SFR_MEM8(0x0004) /* General Purpose IO Register 4 */
+#define GPIOR5 _SFR_MEM8(0x0005) /* General Purpose IO Register 5 */
+#define GPIOR6 _SFR_MEM8(0x0006) /* General Purpose IO Register 6 */
+#define GPIOR7 _SFR_MEM8(0x0007) /* General Purpose IO Register 7 */
+#define GPIOR8 _SFR_MEM8(0x0008) /* General Purpose IO Register 8 */
+#define GPIOR9 _SFR_MEM8(0x0009) /* General Purpose IO Register 9 */
+#define GPIORA _SFR_MEM8(0x000A) /* General Purpose IO Register 10 */
+#define GPIORB _SFR_MEM8(0x000B) /* General Purpose IO Register 11 */
+#define GPIORC _SFR_MEM8(0x000C) /* General Purpose IO Register 12 */
+#define GPIORD _SFR_MEM8(0x000D) /* General Purpose IO Register 13 */
+#define GPIORE _SFR_MEM8(0x000E) /* General Purpose IO Register 14 */
+#define GPIORF _SFR_MEM8(0x000F) /* General Purpose IO Register 15 */
+
+/* Deprecated */
#define GPIO0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */
#define GPIO1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */
#define GPIO2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */
@@ -2604,6 +2622,24 @@
/* ========== Flattened fully qualified IO register names ========== */
/* GPIO - General Purpose IO Registers */
+#define GPIO_GPIOR0 _SFR_MEM8(0x0000)
+#define GPIO_GPIOR1 _SFR_MEM8(0x0001)
+#define GPIO_GPIOR2 _SFR_MEM8(0x0002)
+#define GPIO_GPIOR3 _SFR_MEM8(0x0003)
+#define GPIO_GPIOR4 _SFR_MEM8(0x0004)
+#define GPIO_GPIOR5 _SFR_MEM8(0x0005)
+#define GPIO_GPIOR6 _SFR_MEM8(0x0006)
+#define GPIO_GPIOR7 _SFR_MEM8(0x0007)
+#define GPIO_GPIOR8 _SFR_MEM8(0x0008)
+#define GPIO_GPIOR9 _SFR_MEM8(0x0009)
+#define GPIO_GPIORA _SFR_MEM8(0x000A)
+#define GPIO_GPIORB _SFR_MEM8(0x000B)
+#define GPIO_GPIORC _SFR_MEM8(0x000C)
+#define GPIO_GPIORD _SFR_MEM8(0x000D)
+#define GPIO_GPIORE _SFR_MEM8(0x000E)
+#define GPIO_GPIORF _SFR_MEM8(0x000F)
+
+/* Deprecated */
#define GPIO_GPIO0 _SFR_MEM8(0x0000)
#define GPIO_GPIO1 _SFR_MEM8(0x0001)
#define GPIO_GPIO2 _SFR_MEM8(0x0002)
Modified: trunk/avr-libc/include/avr/iox16a4.h
===================================================================
--- trunk/avr-libc/include/avr/iox16a4.h 2010-06-09 22:48:58 UTC (rev
2154)
+++ trunk/avr-libc/include/avr/iox16a4.h 2010-06-10 03:59:26 UTC (rev
2155)
@@ -1,4 +1,4 @@
-/* Copyright (c) 2009 Atmel Corporation
+/* Copyright (c) 2009-2010 Atmel Corporation
All rights reserved.
Redistribution and use in source and binary forms, with or without
@@ -50,6 +50,24 @@
/* Ungrouped common registers */
+#define GPIOR0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */
+#define GPIOR1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */
+#define GPIOR2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */
+#define GPIOR3 _SFR_MEM8(0x0003) /* General Purpose IO Register 3 */
+#define GPIOR4 _SFR_MEM8(0x0004) /* General Purpose IO Register 4 */
+#define GPIOR5 _SFR_MEM8(0x0005) /* General Purpose IO Register 5 */
+#define GPIOR6 _SFR_MEM8(0x0006) /* General Purpose IO Register 6 */
+#define GPIOR7 _SFR_MEM8(0x0007) /* General Purpose IO Register 7 */
+#define GPIOR8 _SFR_MEM8(0x0008) /* General Purpose IO Register 8 */
+#define GPIOR9 _SFR_MEM8(0x0009) /* General Purpose IO Register 9 */
+#define GPIORA _SFR_MEM8(0x000A) /* General Purpose IO Register 10 */
+#define GPIORB _SFR_MEM8(0x000B) /* General Purpose IO Register 11 */
+#define GPIORC _SFR_MEM8(0x000C) /* General Purpose IO Register 12 */
+#define GPIORD _SFR_MEM8(0x000D) /* General Purpose IO Register 13 */
+#define GPIORE _SFR_MEM8(0x000E) /* General Purpose IO Register 14 */
+#define GPIORF _SFR_MEM8(0x000F) /* General Purpose IO Register 15 */
+
+/* Deprecated */
#define GPIO0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */
#define GPIO1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */
#define GPIO2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */
@@ -2592,6 +2610,24 @@
/* ========== Flattened fully qualified IO register names ========== */
/* GPIO - General Purpose IO Registers */
+#define GPIO_GPIOR0 _SFR_MEM8(0x0000)
+#define GPIO_GPIOR1 _SFR_MEM8(0x0001)
+#define GPIO_GPIOR2 _SFR_MEM8(0x0002)
+#define GPIO_GPIOR3 _SFR_MEM8(0x0003)
+#define GPIO_GPIOR4 _SFR_MEM8(0x0004)
+#define GPIO_GPIOR5 _SFR_MEM8(0x0005)
+#define GPIO_GPIOR6 _SFR_MEM8(0x0006)
+#define GPIO_GPIOR7 _SFR_MEM8(0x0007)
+#define GPIO_GPIOR8 _SFR_MEM8(0x0008)
+#define GPIO_GPIOR9 _SFR_MEM8(0x0009)
+#define GPIO_GPIORA _SFR_MEM8(0x000A)
+#define GPIO_GPIORB _SFR_MEM8(0x000B)
+#define GPIO_GPIORC _SFR_MEM8(0x000C)
+#define GPIO_GPIORD _SFR_MEM8(0x000D)
+#define GPIO_GPIORE _SFR_MEM8(0x000E)
+#define GPIO_GPIORF _SFR_MEM8(0x000F)
+
+/* Deprecated */
#define GPIO_GPIO0 _SFR_MEM8(0x0000)
#define GPIO_GPIO1 _SFR_MEM8(0x0001)
#define GPIO_GPIO2 _SFR_MEM8(0x0002)
Modified: trunk/avr-libc/include/avr/iox16d4.h
===================================================================
--- trunk/avr-libc/include/avr/iox16d4.h 2010-06-09 22:48:58 UTC (rev
2154)
+++ trunk/avr-libc/include/avr/iox16d4.h 2010-06-10 03:59:26 UTC (rev
2155)
@@ -1,4 +1,4 @@
-/* Copyright (c) 2009 Atmel Corporation
+/* Copyright (c) 2009-2010 Atmel Corporation
All rights reserved.
Redistribution and use in source and binary forms, with or without
@@ -50,6 +50,24 @@
/* Ungrouped common registers */
+#define GPIOR0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */
+#define GPIOR1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */
+#define GPIOR2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */
+#define GPIOR3 _SFR_MEM8(0x0003) /* General Purpose IO Register 3 */
+#define GPIOR4 _SFR_MEM8(0x0004) /* General Purpose IO Register 4 */
+#define GPIOR5 _SFR_MEM8(0x0005) /* General Purpose IO Register 5 */
+#define GPIOR6 _SFR_MEM8(0x0006) /* General Purpose IO Register 6 */
+#define GPIOR7 _SFR_MEM8(0x0007) /* General Purpose IO Register 7 */
+#define GPIOR8 _SFR_MEM8(0x0008) /* General Purpose IO Register 8 */
+#define GPIOR9 _SFR_MEM8(0x0009) /* General Purpose IO Register 9 */
+#define GPIORA _SFR_MEM8(0x000A) /* General Purpose IO Register 10 */
+#define GPIORB _SFR_MEM8(0x000B) /* General Purpose IO Register 11 */
+#define GPIORC _SFR_MEM8(0x000C) /* General Purpose IO Register 12 */
+#define GPIORD _SFR_MEM8(0x000D) /* General Purpose IO Register 13 */
+#define GPIORE _SFR_MEM8(0x000E) /* General Purpose IO Register 14 */
+#define GPIORF _SFR_MEM8(0x000F) /* General Purpose IO Register 15 */
+
+/* Deprecated */
#define GPIO0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */
#define GPIO1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */
#define GPIO2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */
@@ -2211,6 +2229,24 @@
/* ========== Flattened fully qualified IO register names ========== */
/* GPIO - General Purpose IO Registers */
+#define GPIO_GPIOR0 _SFR_MEM8(0x0000)
+#define GPIO_GPIOR1 _SFR_MEM8(0x0001)
+#define GPIO_GPIOR2 _SFR_MEM8(0x0002)
+#define GPIO_GPIOR3 _SFR_MEM8(0x0003)
+#define GPIO_GPIOR4 _SFR_MEM8(0x0004)
+#define GPIO_GPIOR5 _SFR_MEM8(0x0005)
+#define GPIO_GPIOR6 _SFR_MEM8(0x0006)
+#define GPIO_GPIOR7 _SFR_MEM8(0x0007)
+#define GPIO_GPIOR8 _SFR_MEM8(0x0008)
+#define GPIO_GPIOR9 _SFR_MEM8(0x0009)
+#define GPIO_GPIORA _SFR_MEM8(0x000A)
+#define GPIO_GPIORB _SFR_MEM8(0x000B)
+#define GPIO_GPIORC _SFR_MEM8(0x000C)
+#define GPIO_GPIORD _SFR_MEM8(0x000D)
+#define GPIO_GPIORE _SFR_MEM8(0x000E)
+#define GPIO_GPIORF _SFR_MEM8(0x000F)
+
+/* Deprecated */
#define GPIO_GPIO0 _SFR_MEM8(0x0000)
#define GPIO_GPIO1 _SFR_MEM8(0x0001)
#define GPIO_GPIO2 _SFR_MEM8(0x0002)
Modified: trunk/avr-libc/include/avr/iox192a3.h
===================================================================
--- trunk/avr-libc/include/avr/iox192a3.h 2010-06-09 22:48:58 UTC (rev
2154)
+++ trunk/avr-libc/include/avr/iox192a3.h 2010-06-10 03:59:26 UTC (rev
2155)
@@ -1,4 +1,4 @@
-/* Copyright (c) 2009 Atmel Corporation
+/* Copyright (c) 2009-2010 Atmel Corporation
All rights reserved.
Redistribution and use in source and binary forms, with or without
@@ -50,6 +50,24 @@
/* Ungrouped common registers */
+#define GPIOR0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */
+#define GPIOR1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */
+#define GPIOR2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */
+#define GPIOR3 _SFR_MEM8(0x0003) /* General Purpose IO Register 3 */
+#define GPIOR4 _SFR_MEM8(0x0004) /* General Purpose IO Register 4 */
+#define GPIOR5 _SFR_MEM8(0x0005) /* General Purpose IO Register 5 */
+#define GPIOR6 _SFR_MEM8(0x0006) /* General Purpose IO Register 6 */
+#define GPIOR7 _SFR_MEM8(0x0007) /* General Purpose IO Register 7 */
+#define GPIOR8 _SFR_MEM8(0x0008) /* General Purpose IO Register 8 */
+#define GPIOR9 _SFR_MEM8(0x0009) /* General Purpose IO Register 9 */
+#define GPIORA _SFR_MEM8(0x000A) /* General Purpose IO Register 10 */
+#define GPIORB _SFR_MEM8(0x000B) /* General Purpose IO Register 11 */
+#define GPIORC _SFR_MEM8(0x000C) /* General Purpose IO Register 12 */
+#define GPIORD _SFR_MEM8(0x000D) /* General Purpose IO Register 13 */
+#define GPIORE _SFR_MEM8(0x000E) /* General Purpose IO Register 14 */
+#define GPIORF _SFR_MEM8(0x000F) /* General Purpose IO Register 15 */
+
+/* Deprecated */
#define GPIO0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */
#define GPIO1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */
#define GPIO2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */
@@ -2604,6 +2622,24 @@
/* ========== Flattened fully qualified IO register names ========== */
/* GPIO - General Purpose IO Registers */
+#define GPIO_GPIOR0 _SFR_MEM8(0x0000)
+#define GPIO_GPIOR1 _SFR_MEM8(0x0001)
+#define GPIO_GPIOR2 _SFR_MEM8(0x0002)
+#define GPIO_GPIOR3 _SFR_MEM8(0x0003)
+#define GPIO_GPIOR4 _SFR_MEM8(0x0004)
+#define GPIO_GPIOR5 _SFR_MEM8(0x0005)
+#define GPIO_GPIOR6 _SFR_MEM8(0x0006)
+#define GPIO_GPIOR7 _SFR_MEM8(0x0007)
+#define GPIO_GPIOR8 _SFR_MEM8(0x0008)
+#define GPIO_GPIOR9 _SFR_MEM8(0x0009)
+#define GPIO_GPIORA _SFR_MEM8(0x000A)
+#define GPIO_GPIORB _SFR_MEM8(0x000B)
+#define GPIO_GPIORC _SFR_MEM8(0x000C)
+#define GPIO_GPIORD _SFR_MEM8(0x000D)
+#define GPIO_GPIORE _SFR_MEM8(0x000E)
+#define GPIO_GPIORF _SFR_MEM8(0x000F)
+
+/* Deprecated */
#define GPIO_GPIO0 _SFR_MEM8(0x0000)
#define GPIO_GPIO1 _SFR_MEM8(0x0001)
#define GPIO_GPIO2 _SFR_MEM8(0x0002)
Modified: trunk/avr-libc/include/avr/iox256a3.h
===================================================================
--- trunk/avr-libc/include/avr/iox256a3.h 2010-06-09 22:48:58 UTC (rev
2154)
+++ trunk/avr-libc/include/avr/iox256a3.h 2010-06-10 03:59:26 UTC (rev
2155)
@@ -1,4 +1,4 @@
-/* Copyright (c) 2009 Atmel Corporation
+/* Copyright (c) 2009-2010 Atmel Corporation
All rights reserved.
Redistribution and use in source and binary forms, with or without
@@ -50,6 +50,24 @@
/* Ungrouped common registers */
+#define GPIOR0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */
+#define GPIOR1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */
+#define GPIOR2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */
+#define GPIOR3 _SFR_MEM8(0x0003) /* General Purpose IO Register 3 */
+#define GPIOR4 _SFR_MEM8(0x0004) /* General Purpose IO Register 4 */
+#define GPIOR5 _SFR_MEM8(0x0005) /* General Purpose IO Register 5 */
+#define GPIOR6 _SFR_MEM8(0x0006) /* General Purpose IO Register 6 */
+#define GPIOR7 _SFR_MEM8(0x0007) /* General Purpose IO Register 7 */
+#define GPIOR8 _SFR_MEM8(0x0008) /* General Purpose IO Register 8 */
+#define GPIOR9 _SFR_MEM8(0x0009) /* General Purpose IO Register 9 */
+#define GPIORA _SFR_MEM8(0x000A) /* General Purpose IO Register 10 */
+#define GPIORB _SFR_MEM8(0x000B) /* General Purpose IO Register 11 */
+#define GPIORC _SFR_MEM8(0x000C) /* General Purpose IO Register 12 */
+#define GPIORD _SFR_MEM8(0x000D) /* General Purpose IO Register 13 */
+#define GPIORE _SFR_MEM8(0x000E) /* General Purpose IO Register 14 */
+#define GPIORF _SFR_MEM8(0x000F) /* General Purpose IO Register 15 */
+
+/* Deprecated */
#define GPIO0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */
#define GPIO1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */
#define GPIO2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */
@@ -2604,6 +2622,24 @@
/* ========== Flattened fully qualified IO register names ========== */
/* GPIO - General Purpose IO Registers */
+#define GPIO_GPIOR0 _SFR_MEM8(0x0000)
+#define GPIO_GPIOR1 _SFR_MEM8(0x0001)
+#define GPIO_GPIOR2 _SFR_MEM8(0x0002)
+#define GPIO_GPIOR3 _SFR_MEM8(0x0003)
+#define GPIO_GPIOR4 _SFR_MEM8(0x0004)
+#define GPIO_GPIOR5 _SFR_MEM8(0x0005)
+#define GPIO_GPIOR6 _SFR_MEM8(0x0006)
+#define GPIO_GPIOR7 _SFR_MEM8(0x0007)
+#define GPIO_GPIOR8 _SFR_MEM8(0x0008)
+#define GPIO_GPIOR9 _SFR_MEM8(0x0009)
+#define GPIO_GPIORA _SFR_MEM8(0x000A)
+#define GPIO_GPIORB _SFR_MEM8(0x000B)
+#define GPIO_GPIORC _SFR_MEM8(0x000C)
+#define GPIO_GPIORD _SFR_MEM8(0x000D)
+#define GPIO_GPIORE _SFR_MEM8(0x000E)
+#define GPIO_GPIORF _SFR_MEM8(0x000F)
+
+/* Deprecated */
#define GPIO_GPIO0 _SFR_MEM8(0x0000)
#define GPIO_GPIO1 _SFR_MEM8(0x0001)
#define GPIO_GPIO2 _SFR_MEM8(0x0002)
Modified: trunk/avr-libc/include/avr/iox256a3b.h
===================================================================
--- trunk/avr-libc/include/avr/iox256a3b.h 2010-06-09 22:48:58 UTC (rev
2154)
+++ trunk/avr-libc/include/avr/iox256a3b.h 2010-06-10 03:59:26 UTC (rev
2155)
@@ -1,4 +1,4 @@
-/* Copyright (c) 2009 Atmel Corporation
+/* Copyright (c) 2009-2010 Atmel Corporation
All rights reserved.
Redistribution and use in source and binary forms, with or without
@@ -50,6 +50,24 @@
/* Ungrouped common registers */
+#define GPIOR0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */
+#define GPIOR1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */
+#define GPIOR2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */
+#define GPIOR3 _SFR_MEM8(0x0003) /* General Purpose IO Register 3 */
+#define GPIOR4 _SFR_MEM8(0x0004) /* General Purpose IO Register 4 */
+#define GPIOR5 _SFR_MEM8(0x0005) /* General Purpose IO Register 5 */
+#define GPIOR6 _SFR_MEM8(0x0006) /* General Purpose IO Register 6 */
+#define GPIOR7 _SFR_MEM8(0x0007) /* General Purpose IO Register 7 */
+#define GPIOR8 _SFR_MEM8(0x0008) /* General Purpose IO Register 8 */
+#define GPIOR9 _SFR_MEM8(0x0009) /* General Purpose IO Register 9 */
+#define GPIORA _SFR_MEM8(0x000A) /* General Purpose IO Register 10 */
+#define GPIORB _SFR_MEM8(0x000B) /* General Purpose IO Register 11 */
+#define GPIORC _SFR_MEM8(0x000C) /* General Purpose IO Register 12 */
+#define GPIORD _SFR_MEM8(0x000D) /* General Purpose IO Register 13 */
+#define GPIORE _SFR_MEM8(0x000E) /* General Purpose IO Register 14 */
+#define GPIORF _SFR_MEM8(0x000F) /* General Purpose IO Register 15 */
+
+/* Deprecated*/
#define GPIO0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */
#define GPIO1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */
#define GPIO2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */
@@ -67,6 +85,7 @@
#define GPIOE _SFR_MEM8(0x000E) /* General Purpose IO Register 14 */
#define GPIOF _SFR_MEM8(0x000F) /* General Purpose IO Register 15 */
+
#define CCP _SFR_MEM8(0x0034) /* Configuration Change Protection */
#define RAMPD _SFR_MEM8(0x0038) /* Ramp D */
#define RAMPX _SFR_MEM8(0x0039) /* Ramp X */
@@ -2602,6 +2621,24 @@
/* ========== Flattened fully qualified IO register names ========== */
/* GPIO - General Purpose IO Registers */
+#define GPIO_GPIOR0 _SFR_MEM8(0x0000)
+#define GPIO_GPIOR1 _SFR_MEM8(0x0001)
+#define GPIO_GPIOR2 _SFR_MEM8(0x0002)
+#define GPIO_GPIOR3 _SFR_MEM8(0x0003)
+#define GPIO_GPIOR4 _SFR_MEM8(0x0004)
+#define GPIO_GPIOR5 _SFR_MEM8(0x0005)
+#define GPIO_GPIOR6 _SFR_MEM8(0x0006)
+#define GPIO_GPIOR7 _SFR_MEM8(0x0007)
+#define GPIO_GPIOR8 _SFR_MEM8(0x0008)
+#define GPIO_GPIOR9 _SFR_MEM8(0x0009)
+#define GPIO_GPIORA _SFR_MEM8(0x000A)
+#define GPIO_GPIORB _SFR_MEM8(0x000B)
+#define GPIO_GPIORC _SFR_MEM8(0x000C)
+#define GPIO_GPIORD _SFR_MEM8(0x000D)
+#define GPIO_GPIORE _SFR_MEM8(0x000E)
+#define GPIO_GPIORF _SFR_MEM8(0x000F)
+
+/* Deprecated */
#define GPIO_GPIO0 _SFR_MEM8(0x0000)
#define GPIO_GPIO1 _SFR_MEM8(0x0001)
#define GPIO_GPIO2 _SFR_MEM8(0x0002)
@@ -2619,6 +2656,7 @@
#define GPIO_GPIOE _SFR_MEM8(0x000E)
#define GPIO_GPIOF _SFR_MEM8(0x000F)
+
/* VPORT0 - Virtual Port 0 */
#define VPORT0_DIR _SFR_MEM8(0x0010)
#define VPORT0_OUT _SFR_MEM8(0x0011)
Modified: trunk/avr-libc/include/avr/iox32a4.h
===================================================================
--- trunk/avr-libc/include/avr/iox32a4.h 2010-06-09 22:48:58 UTC (rev
2154)
+++ trunk/avr-libc/include/avr/iox32a4.h 2010-06-10 03:59:26 UTC (rev
2155)
@@ -1,4 +1,4 @@
-/* Copyright (c) 2009 Atmel Corporation
+/* Copyright (c) 2009-2010 Atmel Corporation
All rights reserved.
Redistribution and use in source and binary forms, with or without
@@ -50,6 +50,24 @@
/* Ungrouped common registers */
+#define GPIOR0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */
+#define GPIOR1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */
+#define GPIOR2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */
+#define GPIOR3 _SFR_MEM8(0x0003) /* General Purpose IO Register 3 */
+#define GPIOR4 _SFR_MEM8(0x0004) /* General Purpose IO Register 4 */
+#define GPIOR5 _SFR_MEM8(0x0005) /* General Purpose IO Register 5 */
+#define GPIOR6 _SFR_MEM8(0x0006) /* General Purpose IO Register 6 */
+#define GPIOR7 _SFR_MEM8(0x0007) /* General Purpose IO Register 7 */
+#define GPIOR8 _SFR_MEM8(0x0008) /* General Purpose IO Register 8 */
+#define GPIOR9 _SFR_MEM8(0x0009) /* General Purpose IO Register 9 */
+#define GPIORA _SFR_MEM8(0x000A) /* General Purpose IO Register 10 */
+#define GPIORB _SFR_MEM8(0x000B) /* General Purpose IO Register 11 */
+#define GPIORC _SFR_MEM8(0x000C) /* General Purpose IO Register 12 */
+#define GPIORD _SFR_MEM8(0x000D) /* General Purpose IO Register 13 */
+#define GPIORE _SFR_MEM8(0x000E) /* General Purpose IO Register 14 */
+#define GPIORF _SFR_MEM8(0x000F) /* General Purpose IO Register 15 */
+
+/* Deprecated */
#define GPIO0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */
#define GPIO1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */
#define GPIO2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */
@@ -2592,6 +2610,24 @@
/* ========== Flattened fully qualified IO register names ========== */
/* GPIO - General Purpose IO Registers */
+#define GPIO_GPIOR0 _SFR_MEM8(0x0000)
+#define GPIO_GPIOR1 _SFR_MEM8(0x0001)
+#define GPIO_GPIOR2 _SFR_MEM8(0x0002)
+#define GPIO_GPIOR3 _SFR_MEM8(0x0003)
+#define GPIO_GPIOR4 _SFR_MEM8(0x0004)
+#define GPIO_GPIOR5 _SFR_MEM8(0x0005)
+#define GPIO_GPIOR6 _SFR_MEM8(0x0006)
+#define GPIO_GPIOR7 _SFR_MEM8(0x0007)
+#define GPIO_GPIOR8 _SFR_MEM8(0x0008)
+#define GPIO_GPIOR9 _SFR_MEM8(0x0009)
+#define GPIO_GPIORA _SFR_MEM8(0x000A)
+#define GPIO_GPIORB _SFR_MEM8(0x000B)
+#define GPIO_GPIORC _SFR_MEM8(0x000C)
+#define GPIO_GPIORD _SFR_MEM8(0x000D)
+#define GPIO_GPIORE _SFR_MEM8(0x000E)
+#define GPIO_GPIORF _SFR_MEM8(0x000F)
+
+/* Deprecated */
#define GPIO_GPIO0 _SFR_MEM8(0x0000)
#define GPIO_GPIO1 _SFR_MEM8(0x0001)
#define GPIO_GPIO2 _SFR_MEM8(0x0002)
Modified: trunk/avr-libc/include/avr/iox64a1.h
===================================================================
--- trunk/avr-libc/include/avr/iox64a1.h 2010-06-09 22:48:58 UTC (rev
2154)
+++ trunk/avr-libc/include/avr/iox64a1.h 2010-06-10 03:59:26 UTC (rev
2155)
@@ -1,4 +1,4 @@
-/* Copyright (c) 2009 Atmel Corporation
+/* Copyright (c) 2009-2010 Atmel Corporation
All rights reserved.
Redistribution and use in source and binary forms, with or without
@@ -50,6 +50,24 @@
/* Ungrouped common registers */
+#define GPIOR0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */
+#define GPIOR1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */
+#define GPIOR2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */
+#define GPIOR3 _SFR_MEM8(0x0003) /* General Purpose IO Register 3 */
+#define GPIOR4 _SFR_MEM8(0x0004) /* General Purpose IO Register 4 */
+#define GPIOR5 _SFR_MEM8(0x0005) /* General Purpose IO Register 5 */
+#define GPIOR6 _SFR_MEM8(0x0006) /* General Purpose IO Register 6 */
+#define GPIOR7 _SFR_MEM8(0x0007) /* General Purpose IO Register 7 */
+#define GPIOR8 _SFR_MEM8(0x0008) /* General Purpose IO Register 8 */
+#define GPIOR9 _SFR_MEM8(0x0009) /* General Purpose IO Register 9 */
+#define GPIORA _SFR_MEM8(0x000A) /* General Purpose IO Register 10 */
+#define GPIORB _SFR_MEM8(0x000B) /* General Purpose IO Register 11 */
+#define GPIORC _SFR_MEM8(0x000C) /* General Purpose IO Register 12 */
+#define GPIORD _SFR_MEM8(0x000D) /* General Purpose IO Register 13 */
+#define GPIORE _SFR_MEM8(0x000E) /* General Purpose IO Register 14 */
+#define GPIORF _SFR_MEM8(0x000F) /* General Purpose IO Register 15 */
+
+/* Deprecated */
#define GPIO0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */
#define GPIO1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */
#define GPIO2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */
@@ -2613,6 +2631,24 @@
/* ========== Flattened fully qualified IO register names ========== */
/* GPIO - General Purpose IO Registers */
+#define GPIO_GPIOR0 _SFR_MEM8(0x0000)
+#define GPIO_GPIOR1 _SFR_MEM8(0x0001)
+#define GPIO_GPIOR2 _SFR_MEM8(0x0002)
+#define GPIO_GPIOR3 _SFR_MEM8(0x0003)
+#define GPIO_GPIOR4 _SFR_MEM8(0x0004)
+#define GPIO_GPIOR5 _SFR_MEM8(0x0005)
+#define GPIO_GPIOR6 _SFR_MEM8(0x0006)
+#define GPIO_GPIOR7 _SFR_MEM8(0x0007)
+#define GPIO_GPIOR8 _SFR_MEM8(0x0008)
+#define GPIO_GPIOR9 _SFR_MEM8(0x0009)
+#define GPIO_GPIORA _SFR_MEM8(0x000A)
+#define GPIO_GPIORB _SFR_MEM8(0x000B)
+#define GPIO_GPIORC _SFR_MEM8(0x000C)
+#define GPIO_GPIORD _SFR_MEM8(0x000D)
+#define GPIO_GPIORE _SFR_MEM8(0x000E)
+#define GPIO_GPIORF _SFR_MEM8(0x000F)
+
+/* Deprecated */
#define GPIO_GPIO0 _SFR_MEM8(0x0000)
#define GPIO_GPIO1 _SFR_MEM8(0x0001)
#define GPIO_GPIO2 _SFR_MEM8(0x0002)
Modified: trunk/avr-libc/include/avr/iox64a3.h
===================================================================
--- trunk/avr-libc/include/avr/iox64a3.h 2010-06-09 22:48:58 UTC (rev
2154)
+++ trunk/avr-libc/include/avr/iox64a3.h 2010-06-10 03:59:26 UTC (rev
2155)
@@ -1,4 +1,4 @@
-/* Copyright (c) 2009 Atmel Corporation
+/* Copyright (c) 2009-2010 Atmel Corporation
All rights reserved.
Redistribution and use in source and binary forms, with or without
@@ -50,6 +50,24 @@
/* Ungrouped common registers */
+#define GPIOR0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */
+#define GPIOR1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */
+#define GPIOR2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */
+#define GPIOR3 _SFR_MEM8(0x0003) /* General Purpose IO Register 3 */
+#define GPIOR4 _SFR_MEM8(0x0004) /* General Purpose IO Register 4 */
+#define GPIOR5 _SFR_MEM8(0x0005) /* General Purpose IO Register 5 */
+#define GPIOR6 _SFR_MEM8(0x0006) /* General Purpose IO Register 6 */
+#define GPIOR7 _SFR_MEM8(0x0007) /* General Purpose IO Register 7 */
+#define GPIOR8 _SFR_MEM8(0x0008) /* General Purpose IO Register 8 */
+#define GPIOR9 _SFR_MEM8(0x0009) /* General Purpose IO Register 9 */
+#define GPIORA _SFR_MEM8(0x000A) /* General Purpose IO Register 10 */
+#define GPIORB _SFR_MEM8(0x000B) /* General Purpose IO Register 11 */
+#define GPIORC _SFR_MEM8(0x000C) /* General Purpose IO Register 12 */
+#define GPIORD _SFR_MEM8(0x000D) /* General Purpose IO Register 13 */
+#define GPIORE _SFR_MEM8(0x000E) /* General Purpose IO Register 14 */
+#define GPIORF _SFR_MEM8(0x000F) /* General Purpose IO Register 15 */
+
+/* Deprecated */
#define GPIO0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */
#define GPIO1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */
#define GPIO2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */
@@ -2604,6 +2622,24 @@
/* ========== Flattened fully qualified IO register names ========== */
/* GPIO - General Purpose IO Registers */
+#define GPIO_GPIOR0 _SFR_MEM8(0x0000)
+#define GPIO_GPIOR1 _SFR_MEM8(0x0001)
+#define GPIO_GPIOR2 _SFR_MEM8(0x0002)
+#define GPIO_GPIOR3 _SFR_MEM8(0x0003)
+#define GPIO_GPIOR4 _SFR_MEM8(0x0004)
+#define GPIO_GPIOR5 _SFR_MEM8(0x0005)
+#define GPIO_GPIOR6 _SFR_MEM8(0x0006)
+#define GPIO_GPIOR7 _SFR_MEM8(0x0007)
+#define GPIO_GPIOR8 _SFR_MEM8(0x0008)
+#define GPIO_GPIOR9 _SFR_MEM8(0x0009)
+#define GPIO_GPIORA _SFR_MEM8(0x000A)
+#define GPIO_GPIORB _SFR_MEM8(0x000B)
+#define GPIO_GPIORC _SFR_MEM8(0x000C)
+#define GPIO_GPIORD _SFR_MEM8(0x000D)
+#define GPIO_GPIORE _SFR_MEM8(0x000E)
+#define GPIO_GPIORF _SFR_MEM8(0x000F)
+
+/* Deprecated */
#define GPIO_GPIO0 _SFR_MEM8(0x0000)
#define GPIO_GPIO1 _SFR_MEM8(0x0001)
#define GPIO_GPIO2 _SFR_MEM8(0x0002)
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- [avr-libc-commit] [2155] 2010-06-09 Eric B.,
Eric Weddington <=